RAPIDIO-based VPX board card for high-speed synchronous data acquisition
The invention discloses a high-speed synchronous data acquisition VPX board card based on RAPIDIO, which is characterized by comprising a VPX interface circuit, a power supply circuit, an operational amplifier follower circuit, an ADC acquisition analog circuit, a digital and analog signal isolation...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | LIU BINGKUN LIU HAILING ZHU HENGFEI HUO BINGXIU |
description | The invention discloses a high-speed synchronous data acquisition VPX board card based on RAPIDIO, which is characterized by comprising a VPX interface circuit, a power supply circuit, an operational amplifier follower circuit, an ADC acquisition analog circuit, a digital and analog signal isolation circuit, a synchronous time circuit, a serial port control circuit, a DDR3 memory storage circuit, an FPGA protocol data transmission circuit and a logic storage and update circuit, the VPX interface circuit, the digital and analog signal isolation circuit, the synchronization time circuit, the serial port control circuit, the DDR3 memory storage circuit and the logic storage and update circuit are all connected with the FPGA protocol data transmission circuit. The invention has the advantages and beneficial effects that the USB bus interface is expanded through the protocol conversion circuit to generate a plurality of PCI interfaces, the PCI equipment is mounted through the USB interfaces, the difficulty that th |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN114137862A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN114137862A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN114137862A3</originalsourceid><addsrcrecordid>eNrjZPAIcgzwdPH0101KLE5NUQgLiFBIyk8sSlFIBhFp-UUKGZnpGbrFBalA2eLKvOSMovy8_NJihZTEkkSFxOTC0szizJLM_DweBta0xJziVF4ozc2g6OYa4uyhm1qQH59aXJCYnJqXWhLv7GdoaGJobG5hZuRoTIwaAOvnMzg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>RAPIDIO-based VPX board card for high-speed synchronous data acquisition</title><source>esp@cenet</source><creator>LIU BINGKUN ; LIU HAILING ; ZHU HENGFEI ; HUO BINGXIU</creator><creatorcontrib>LIU BINGKUN ; LIU HAILING ; ZHU HENGFEI ; HUO BINGXIU</creatorcontrib><description>The invention discloses a high-speed synchronous data acquisition VPX board card based on RAPIDIO, which is characterized by comprising a VPX interface circuit, a power supply circuit, an operational amplifier follower circuit, an ADC acquisition analog circuit, a digital and analog signal isolation circuit, a synchronous time circuit, a serial port control circuit, a DDR3 memory storage circuit, an FPGA protocol data transmission circuit and a logic storage and update circuit, the VPX interface circuit, the digital and analog signal isolation circuit, the synchronization time circuit, the serial port control circuit, the DDR3 memory storage circuit and the logic storage and update circuit are all connected with the FPGA protocol data transmission circuit. The invention has the advantages and beneficial effects that the USB bus interface is expanded through the protocol conversion circuit to generate a plurality of PCI interfaces, the PCI equipment is mounted through the USB interfaces, the difficulty that th</description><language>chi ; eng</language><subject>CONTROL OR REGULATING SYSTEMS IN GENERAL ; CONTROLLING ; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS ; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS ; PHYSICS ; REGULATING</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220304&DB=EPODOC&CC=CN&NR=114137862A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220304&DB=EPODOC&CC=CN&NR=114137862A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LIU BINGKUN</creatorcontrib><creatorcontrib>LIU HAILING</creatorcontrib><creatorcontrib>ZHU HENGFEI</creatorcontrib><creatorcontrib>HUO BINGXIU</creatorcontrib><title>RAPIDIO-based VPX board card for high-speed synchronous data acquisition</title><description>The invention discloses a high-speed synchronous data acquisition VPX board card based on RAPIDIO, which is characterized by comprising a VPX interface circuit, a power supply circuit, an operational amplifier follower circuit, an ADC acquisition analog circuit, a digital and analog signal isolation circuit, a synchronous time circuit, a serial port control circuit, a DDR3 memory storage circuit, an FPGA protocol data transmission circuit and a logic storage and update circuit, the VPX interface circuit, the digital and analog signal isolation circuit, the synchronization time circuit, the serial port control circuit, the DDR3 memory storage circuit and the logic storage and update circuit are all connected with the FPGA protocol data transmission circuit. The invention has the advantages and beneficial effects that the USB bus interface is expanded through the protocol conversion circuit to generate a plurality of PCI interfaces, the PCI equipment is mounted through the USB interfaces, the difficulty that th</description><subject>CONTROL OR REGULATING SYSTEMS IN GENERAL</subject><subject>CONTROLLING</subject><subject>FUNCTIONAL ELEMENTS OF SUCH SYSTEMS</subject><subject>MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS</subject><subject>PHYSICS</subject><subject>REGULATING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAIcgzwdPH0101KLE5NUQgLiFBIyk8sSlFIBhFp-UUKGZnpGbrFBalA2eLKvOSMovy8_NJihZTEkkSFxOTC0szizJLM_DweBta0xJziVF4ozc2g6OYa4uyhm1qQH59aXJCYnJqXWhLv7GdoaGJobG5hZuRoTIwaAOvnMzg</recordid><startdate>20220304</startdate><enddate>20220304</enddate><creator>LIU BINGKUN</creator><creator>LIU HAILING</creator><creator>ZHU HENGFEI</creator><creator>HUO BINGXIU</creator><scope>EVB</scope></search><sort><creationdate>20220304</creationdate><title>RAPIDIO-based VPX board card for high-speed synchronous data acquisition</title><author>LIU BINGKUN ; LIU HAILING ; ZHU HENGFEI ; HUO BINGXIU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN114137862A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2022</creationdate><topic>CONTROL OR REGULATING SYSTEMS IN GENERAL</topic><topic>CONTROLLING</topic><topic>FUNCTIONAL ELEMENTS OF SUCH SYSTEMS</topic><topic>MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS</topic><topic>PHYSICS</topic><topic>REGULATING</topic><toplevel>online_resources</toplevel><creatorcontrib>LIU BINGKUN</creatorcontrib><creatorcontrib>LIU HAILING</creatorcontrib><creatorcontrib>ZHU HENGFEI</creatorcontrib><creatorcontrib>HUO BINGXIU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIU BINGKUN</au><au>LIU HAILING</au><au>ZHU HENGFEI</au><au>HUO BINGXIU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>RAPIDIO-based VPX board card for high-speed synchronous data acquisition</title><date>2022-03-04</date><risdate>2022</risdate><abstract>The invention discloses a high-speed synchronous data acquisition VPX board card based on RAPIDIO, which is characterized by comprising a VPX interface circuit, a power supply circuit, an operational amplifier follower circuit, an ADC acquisition analog circuit, a digital and analog signal isolation circuit, a synchronous time circuit, a serial port control circuit, a DDR3 memory storage circuit, an FPGA protocol data transmission circuit and a logic storage and update circuit, the VPX interface circuit, the digital and analog signal isolation circuit, the synchronization time circuit, the serial port control circuit, the DDR3 memory storage circuit and the logic storage and update circuit are all connected with the FPGA protocol data transmission circuit. The invention has the advantages and beneficial effects that the USB bus interface is expanded through the protocol conversion circuit to generate a plurality of PCI interfaces, the PCI equipment is mounted through the USB interfaces, the difficulty that th</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_CN114137862A |
source | esp@cenet |
subjects | CONTROL OR REGULATING SYSTEMS IN GENERAL CONTROLLING FUNCTIONAL ELEMENTS OF SUCH SYSTEMS MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS PHYSICS REGULATING |
title | RAPIDIO-based VPX board card for high-speed synchronous data acquisition |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-21T02%3A30%3A47IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LIU%20BINGKUN&rft.date=2022-03-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN114137862A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |