Semiconductor package and method of manufacturing the same

Disclosed are semiconductor packages and a method of fabricating the same. The semiconductor package includes a redistribution substrate including redistribution line patterns in a dielectric layer, and a semiconductor chip on the redistribution substrate. The semiconductor chip includes chip pads e...

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Bibliographische Detailangaben
Hauptverfasser: LEE CHUNG-SUN, PARK JUM-YONG, OH DONG-JOON, KWEON JUN-YUN, CHOI JU-IL, AN JIN-HO, HWANG HYUN-SOO
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:Disclosed are semiconductor packages and a method of fabricating the same. The semiconductor package includes a redistribution substrate including redistribution line patterns in a dielectric layer, and a semiconductor chip on the redistribution substrate. The semiconductor chip includes chip pads electrically connected to the redistribution line patterns. Each of the redistribution line patterns has a substantially planar top surface and a nonplanar bottom surface. Each of the redistribution line patterns includes a central portion and edge portions on opposite sides of the central portion. Each of the redistribution line patterns has a first thickness as a minimum thickness at the central portion and a second thickness as a maximum thickness at the edge portions. 公开了半导体封装件及其制造方法。半导体封装件包括重分布衬底,其包括电介质层中的重分布线图案;以及半导体芯片,其位于重分布衬底上。半导体芯片包括芯片焊盘,其电连接至重分布线图案。重分布线图案中的每一个具有基本上共面的顶表面和非共面的底表面。重分布线图案中的每一个包括中心部分和位于中心部分的相对侧上的边缘部分。重分布线图案中的每一个在中心部分处具有作为最小厚度的第一厚度,并且在边缘部分处作为最大厚度的第二厚度。