DMA-SCATTER AND GATHER OPERATIONS FOR NON-CONTIGUOUS MEMORY
A direct memory access (DMA) controller, includes circuitry configured to load a DMA transfer descriptor configured to define which memory elements within a contiguous block of n memory elements are to be included in a given DMA transfer. The circuitry is further configured to, based on the DMA tran...
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| creator | BIRSAN LAURENTIU TREES JASON PATEL MANISH |
| description | A direct memory access (DMA) controller, includes circuitry configured to load a DMA transfer descriptor configured to define which memory elements within a contiguous block of n memory elements are to be included in a given DMA transfer. The circuitry is further configured to, based on the DMA transfer descriptor, determine whether each memory element within the contiguous block of n memory elements is to be included in the given DMA transfer, including a determination that two or more non-contiguous sub-blocks of memory elements within the contiguous block of n memory elements are to be transferred. The circuitry is further configured to, based on the determination of whether each memory element within the contiguous block of n memory elements is to be included in the given DMA transfer, perform the DMA transfer of memory elements determined to be included within the given DMA transfer.
直接存储器访问(DMA)控制器包括被配置为加载DMA传输描述符的电路，该DMA传输描述符被配置为限定n个存储器元件的连续块内的哪些存储器元件将被包括在给定DMA传输中。该电路还被配置为基于DMA传输描述符来确定n个存储器元件的连续块内的每个存储 |
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直接存储器访问(DMA)控制器包括被配置为加载DMA传输描述符的电路，该DMA传输描述符被配置为限定n个存储器元件的连续块内的哪些存储器元件将被包括在给定DMA传输中。该电路还被配置为基于DMA传输描述符来确定n个存储器元件的连续块内的每个存储</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220215&DB=EPODOC&CC=CN&NR=114051611A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20220215&DB=EPODOC&CC=CN&NR=114051611A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BIRSAN LAURENTIU</creatorcontrib><creatorcontrib>TREES JASON</creatorcontrib><creatorcontrib>PATEL MANISH</creatorcontrib><title>DMA-SCATTER AND GATHER OPERATIONS FOR NON-CONTIGUOUS MEMORY</title><description>A direct memory access (DMA) controller, includes circuitry configured to load a DMA transfer descriptor configured to define which memory elements within a contiguous block of n memory elements are to be included in a given DMA transfer. The circuitry is further configured to, based on the DMA transfer descriptor, determine whether each memory element within the contiguous block of n memory elements is to be included in the given DMA transfer, including a determination that two or more non-contiguous sub-blocks of memory elements within the contiguous block of n memory elements are to be transferred. The circuitry is further configured to, based on the determination of whether each memory element within the contiguous block of n memory elements is to be included in the given DMA transfer, perform the DMA transfer of memory elements determined to be included within the given DMA transfer.
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直接存储器访问(DMA)控制器包括被配置为加载DMA传输描述符的电路，该DMA传输描述符被配置为限定n个存储器元件的连续块内的哪些存储器元件将被包括在给定DMA传输中。该电路还被配置为基于DMA传输描述符来确定n个存储器元件的连续块内的每个存储</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | DMA-SCATTER AND GATHER OPERATIONS FOR NON-CONTIGUOUS MEMORY |
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