Memory controller, internet of things chip and electronic equipment

The invention discloses a memory controller, which comprises a transaction layer, a data link layer and a physical layer, wherein the transaction layer is used for supporting a plurality of system interfaces and a storage interface, and processing protocol conversion between the plurality of system interfaces and the storage interface; the data link layer is used for receiving and analyzing the command of the storage interface transmitted by the transaction layer, generating a corresponding PSRAM protocol command according to various PSRAM interface protocols, and distinguishing different PSRAM protocols according to the PSRAM protocol command; and the physical layer is used for receiving the PSRAM protocol and processing the PSRAM protocol according to the PSRAM so as to generate the PSRAM protocol matched with the PSRAM. By the adoption of the memory controller, compatibility of different PSRAM interface protocols is facilitated, and compatibility of various PSRAM product models is achieved. The invention f