MEMS package, semiconductor structure and method of forming same

Various embodiments of the present invention are directed to methods of roughening a crystalline layer. A crystalline layer is deposited over the substrate. The mask material diffuses into the crystalline layer along a grain boundary of the crystalline layer. For example, the crystalline layer and t...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: CHEN TINGRONG
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHEN TINGRONG
description Various embodiments of the present invention are directed to methods of roughening a crystalline layer. A crystalline layer is deposited over the substrate. The mask material diffuses into the crystalline layer along a grain boundary of the crystalline layer. For example, the crystalline layer and the mask material may be polysilicon and silicon oxide respectively, or include polysilicon and silicon oxide, respectively. However, other suitable materials are also feasible. Etching is performed on the crystalline layer with an etchant having high selectivity to the crystalline layer with respect to the mask material. The mask material defines a micromask embedded in the crystalline layer along the grain boundary. The micromask protects portions of the underlying crystalline layer during etching such that etching forms trenches in the crystalline layer that are not masked by the micromask. The embodiment of the invention also relates to a MEMS package, a semiconductor structure and a forming method thereof. 本发明的
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN113651285A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN113651285A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN113651285A3</originalsourceid><addsrcrecordid>eNrjZHDwdfUNVihITM5OTE_VUShOzc1Mzs9LKU0uyS9SKC4pAjJKi1IVEvNSFHJTSzLyUxTy0xTS8otyM_PSFYoTc1N5GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqMdDk1LzUknhnP0NDYzNTQyMLU0djYtQAAI8EMOI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MEMS package, semiconductor structure and method of forming same</title><source>esp@cenet</source><creator>CHEN TINGRONG</creator><creatorcontrib>CHEN TINGRONG</creatorcontrib><description>Various embodiments of the present invention are directed to methods of roughening a crystalline layer. A crystalline layer is deposited over the substrate. The mask material diffuses into the crystalline layer along a grain boundary of the crystalline layer. For example, the crystalline layer and the mask material may be polysilicon and silicon oxide respectively, or include polysilicon and silicon oxide, respectively. However, other suitable materials are also feasible. Etching is performed on the crystalline layer with an etchant having high selectivity to the crystalline layer with respect to the mask material. The mask material defines a micromask embedded in the crystalline layer along the grain boundary. The micromask protects portions of the underlying crystalline layer during etching such that etching forms trenches in the crystalline layer that are not masked by the micromask. The embodiment of the invention also relates to a MEMS package, a semiconductor structure and a forming method thereof. 本发明的</description><language>chi ; eng</language><subject>MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES ; MICROSTRUCTURAL TECHNOLOGY ; PERFORMING OPERATIONS ; PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS ; TRANSPORTING</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20211116&amp;DB=EPODOC&amp;CC=CN&amp;NR=113651285A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20211116&amp;DB=EPODOC&amp;CC=CN&amp;NR=113651285A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHEN TINGRONG</creatorcontrib><title>MEMS package, semiconductor structure and method of forming same</title><description>Various embodiments of the present invention are directed to methods of roughening a crystalline layer. A crystalline layer is deposited over the substrate. The mask material diffuses into the crystalline layer along a grain boundary of the crystalline layer. For example, the crystalline layer and the mask material may be polysilicon and silicon oxide respectively, or include polysilicon and silicon oxide, respectively. However, other suitable materials are also feasible. Etching is performed on the crystalline layer with an etchant having high selectivity to the crystalline layer with respect to the mask material. The mask material defines a micromask embedded in the crystalline layer along the grain boundary. The micromask protects portions of the underlying crystalline layer during etching such that etching forms trenches in the crystalline layer that are not masked by the micromask. The embodiment of the invention also relates to a MEMS package, a semiconductor structure and a forming method thereof. 本发明的</description><subject>MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES</subject><subject>MICROSTRUCTURAL TECHNOLOGY</subject><subject>PERFORMING OPERATIONS</subject><subject>PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS</subject><subject>TRANSPORTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHDwdfUNVihITM5OTE_VUShOzc1Mzs9LKU0uyS9SKC4pAjJKi1IVEvNSFHJTSzLyUxTy0xTS8otyM_PSFYoTc1N5GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqMdDk1LzUknhnP0NDYzNTQyMLU0djYtQAAI8EMOI</recordid><startdate>20211116</startdate><enddate>20211116</enddate><creator>CHEN TINGRONG</creator><scope>EVB</scope></search><sort><creationdate>20211116</creationdate><title>MEMS package, semiconductor structure and method of forming same</title><author>CHEN TINGRONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN113651285A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2021</creationdate><topic>MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES</topic><topic>MICROSTRUCTURAL TECHNOLOGY</topic><topic>PERFORMING OPERATIONS</topic><topic>PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS</topic><topic>TRANSPORTING</topic><toplevel>online_resources</toplevel><creatorcontrib>CHEN TINGRONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHEN TINGRONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MEMS package, semiconductor structure and method of forming same</title><date>2021-11-16</date><risdate>2021</risdate><abstract>Various embodiments of the present invention are directed to methods of roughening a crystalline layer. A crystalline layer is deposited over the substrate. The mask material diffuses into the crystalline layer along a grain boundary of the crystalline layer. For example, the crystalline layer and the mask material may be polysilicon and silicon oxide respectively, or include polysilicon and silicon oxide, respectively. However, other suitable materials are also feasible. Etching is performed on the crystalline layer with an etchant having high selectivity to the crystalline layer with respect to the mask material. The mask material defines a micromask embedded in the crystalline layer along the grain boundary. The micromask protects portions of the underlying crystalline layer during etching such that etching forms trenches in the crystalline layer that are not masked by the micromask. The embodiment of the invention also relates to a MEMS package, a semiconductor structure and a forming method thereof. 本发明的</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN113651285A
source esp@cenet
subjects MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES
MICROSTRUCTURAL TECHNOLOGY
PERFORMING OPERATIONS
PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
TRANSPORTING
title MEMS package, semiconductor structure and method of forming same
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T11%3A15%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHEN%20TINGRONG&rft.date=2021-11-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN113651285A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true