Time sequence model establishing method
The invention provides a time sequence model establishing method. The time sequence model establishing method comprises the following steps: identifying at least one first damaged path which is a boundary path in a circuit block; determining whether to remove a first intrusive path corresponding to...
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| creator | CAI MINXIU LIAO XINXIONG |
| description | The invention provides a time sequence model establishing method. The time sequence model establishing method comprises the following steps: identifying at least one first damaged path which is a boundary path in a circuit block; determining whether to remove a first intrusive path corresponding to the first victim path according to the transmission delay on the first victim path; searching a plurality of high fan-out circuit components of which the fan-out numbers are greater than a default value in the circuit block; determining whether to remove each high fan-out circuit component according to the connection position of each high fan-out circuit component; and identifying a plurality of second victim paths corresponding to each high fan-out circuit component, and determining to reserve or remove a second aggressive path corresponding to each second victim path according to the transmission delay of each second victim path. According to the time sequence model establishing method, the complexity of the time |
| format | Patent |
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The time sequence model establishing method comprises the following steps: identifying at least one first damaged path which is a boundary path in a circuit block; determining whether to remove a first intrusive path corresponding to the first victim path according to the transmission delay on the first victim path; searching a plurality of high fan-out circuit components of which the fan-out numbers are greater than a default value in the circuit block; determining whether to remove each high fan-out circuit component according to the connection position of each high fan-out circuit component; and identifying a plurality of second victim paths corresponding to each high fan-out circuit component, and determining to reserve or remove a second aggressive path corresponding to each second victim path according to the transmission delay of each second victim path. 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The time sequence model establishing method comprises the following steps: identifying at least one first damaged path which is a boundary path in a circuit block; determining whether to remove a first intrusive path corresponding to the first victim path according to the transmission delay on the first victim path; searching a plurality of high fan-out circuit components of which the fan-out numbers are greater than a default value in the circuit block; determining whether to remove each high fan-out circuit component according to the connection position of each high fan-out circuit component; and identifying a plurality of second victim paths corresponding to each high fan-out circuit component, and determining to reserve or remove a second aggressive path corresponding to each second victim path according to the transmission delay of each second victim path. According to the time sequence model establishing method, the complexity of the time</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAPycxNVShOLSxNzUtOVcjNT0nNUUgtLklMyskszsjMS1fITS3JyE_hYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GhsYmZhYWJgaOxsSoAQCo8CgL</recordid><startdate>20211001</startdate><enddate>20211001</enddate><creator>CAI MINXIU</creator><creator>LIAO XINXIONG</creator><scope>EVB</scope></search><sort><creationdate>20211001</creationdate><title>Time sequence model establishing method</title><author>CAI MINXIU ; LIAO XINXIONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN113468840A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2021</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>CAI MINXIU</creatorcontrib><creatorcontrib>LIAO XINXIONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CAI MINXIU</au><au>LIAO XINXIONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Time sequence model establishing method</title><date>2021-10-01</date><risdate>2021</risdate><abstract>The invention provides a time sequence model establishing method. The time sequence model establishing method comprises the following steps: identifying at least one first damaged path which is a boundary path in a circuit block; determining whether to remove a first intrusive path corresponding to the first victim path according to the transmission delay on the first victim path; searching a plurality of high fan-out circuit components of which the fan-out numbers are greater than a default value in the circuit block; determining whether to remove each high fan-out circuit component according to the connection position of each high fan-out circuit component; and identifying a plurality of second victim paths corresponding to each high fan-out circuit component, and determining to reserve or remove a second aggressive path corresponding to each second victim path according to the transmission delay of each second victim path. According to the time sequence model establishing method, the complexity of the time</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Time sequence model establishing method |
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