Reset error-proofing circuit and method applied to low-voltage process of chip

The invention discloses a reset error-proofing circuit and method applied to a chip low-voltage process, and relates to the technical field of electronic circuits, and the method comprises the steps: step 1, collecting chip reset feature data through a large number of tests; step 2, obtaining a reset characteristic curve according to the reset characteristic data; step 3, establishing a mathematical model for prediction; and step 4, carrying out component parameter matching calculation. The chip is in the reset state when the power supply of the chip is abnormal, and the reset is automatically released when the abnormity disappears, so that the chip can automatically return to normal, and the influence of the external environment on the chip is reduced. 本发明公开了一种应用于芯片低压过程的复位防错电路与方法，涉及电子电路技术领域，包括：步骤1、通过大量测试采集芯片复位特征数据；步骤2、根据所述复位特征数据得到复位特征曲线；步骤3、建立预测的数学模型；步骤4、元器件参数匹配计算。本发明在芯片电源异常时使芯片处于复位状态，在异常消失时自动释放复位，使芯片可以自行恢复正常，从而减少外部环境对芯片的影响。