Formation method of semiconductor structure
The invention relates to the technical field of semiconductors, in particular to a forming method of a semiconductor structure. The forming method comprises the steps that a semiconductor substrate is provided, a stacked capacitor structure is formed in the semiconductor substrate, the stacked capac...
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creator | CAI QIAOMING WANG ZHE |
description | The invention relates to the technical field of semiconductors, in particular to a forming method of a semiconductor structure. The forming method comprises the steps that a semiconductor substrate is provided, a stacked capacitor structure is formed in the semiconductor substrate, the stacked capacitor structure comprises at least three electrode layers and insulating layers located between the adjacent electrode layers, and the electrode layers and the insulating layers extend to the surface of the semiconductor substrate; a photoresist layer comprising a first opening is formed on the surface of the stacked capacitor structure, and the first opening exposes the electrode layer on the topmost layer; an etching process is executed along the first opening until the next electrode layer is exposed; partial ashing is conducted on the photoresist layer to expand the first opening to a set value; continuing to execute the etching process along the first opening is conducted until the next electrode layer is expos |
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The forming method comprises the steps that a semiconductor substrate is provided, a stacked capacitor structure is formed in the semiconductor substrate, the stacked capacitor structure comprises at least three electrode layers and insulating layers located between the adjacent electrode layers, and the electrode layers and the insulating layers extend to the surface of the semiconductor substrate; a photoresist layer comprising a first opening is formed on the surface of the stacked capacitor structure, and the first opening exposes the electrode layer on the topmost layer; an etching process is executed along the first opening until the next electrode layer is exposed; partial ashing is conducted on the photoresist layer to expand the first opening to a set value; continuing to execute the etching process along the first opening is conducted until the next electrode layer is expos</abstract><oa>free_for_read</oa></addata></record> |
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subjects | ELECTRICITY |
title | Formation method of semiconductor structure |
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