Integrated chip, memory device and forming method thereof

Various embodiments of the invention relate to a memory cell including a data storage structure disposed between a top electrode and a bottom electrode. The data storage structure includes a lower switching layer overlying the bottom electrode and an upper switching layer overlying the lower switching layer. The lower exchange layer includes a dielectric material doped with a first dopant. The embodiment of the invention also relates to an integrated chip, a memory device and a forming method thereof. 本发明的各个实施例涉及存储器单元，该存储器单元包括设置在顶部电极与底部电极之间的数据存储结构。该数据存储结构包括覆盖在底部电极上的下部交换层和覆盖在下部交换层上的上部交换层。下部交换层包括掺杂有第一掺杂剂的介电材料。本申请的实施例还涉及集成芯片、存储器件及其形成方法。