SECURE PERIPHERAL INTERCONNECT

An integrated-circuit device (1) comprises a bus system (2) connected to a processor (4), a plurality of peripherals (12, 14, 16, 17), each connected to the bus system (2), hardware filter logic (24,26); and a peripheral interconnect system (28), separate from the bus system (2) and connected to the...

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Bibliographische Detailangaben
Hauptverfasser: BARZIC RONAN, NORE ANDERS, ENDRESEN VEGARD
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:An integrated-circuit device (1) comprises a bus system (2) connected to a processor (4), a plurality of peripherals (12, 14, 16, 17), each connected to the bus system (2), hardware filter logic (24,26); and a peripheral interconnect system (28), separate from the bus system (2) and connected to the peripherals (12, 14, 16, 17). For each peripheral, the hardware filter logic (24, 26) stores a respective value determining whether the peripheral is in a secure state. The peripheral interconnect system (28) provides a set of one or more channels for signalling events between peripherals (12, 14,16, 17). At least one channel is a secure channel (34) or is configurable to be a secure channel (34). The peripheral interconnect system (28) is configured to allow an event signal from a peripheral(12, 14, 16, 17) in the secure state to be sent over a secure channel (34) and to prevent an event signal from a peripheral (12, 14, 16, 17) that is not in the secure state from being sent over the secure channel (34). 一种集成电路设