Watchdog circuit capable of configuring reset duration and timing duration

A watchdog circuit capable of configuring reset duration and timing duration comprises: a watchdog chip, a binary counter chip, an RC charging and discharging circuit, a triode unit, a PMOSS tube unitand a power supply unit, the watchdog chip is connected with the binary counter chip, the binary cou...

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Hauptverfasser: LIU XUZHI, BAO XINJIN, GONG GUOLONG
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Sprache:chi ; eng
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creator LIU XUZHI
BAO XINJIN
GONG GUOLONG
description A watchdog circuit capable of configuring reset duration and timing duration comprises: a watchdog chip, a binary counter chip, an RC charging and discharging circuit, a triode unit, a PMOSS tube unitand a power supply unit, the watchdog chip is connected with the binary counter chip, the binary counter chip is connected with the RC charging and discharging circuit, and the power supply unit is connected with the RC charging and discharging circuit. The triode unit is connected with the binary counter chip, the PMOSS tube unit is connected with the triode unit, and the power supply unit is respectively connected with the watchdog chip, the binary counter chip, the RC charging and discharging circuit, the triode unit and the PMOSS tube unit. Compared with the prior art, the watchdog systemhas the advantages that the timing duration and the reset market duration can be set, the watchdog system is matched with the monitored single-chip microcomputer system, reset/restart of the single-chip microcomputer system i
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN112506694A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN112506694A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN112506694A3</originalsourceid><addsrcrecordid>eNrjZPAKTyxJzkjJT1dIzixKLs0sUUhOLEhMyklVyE9TSM7PS8tMLy3KzEtXKEotTi1RSCktSizJzM9TSMxLUSjJzAXJwMR4GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakm8s5-hoZGpgZmZpYmjMTFqAD6WNVs</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Watchdog circuit capable of configuring reset duration and timing duration</title><source>esp@cenet</source><creator>LIU XUZHI ; BAO XINJIN ; GONG GUOLONG</creator><creatorcontrib>LIU XUZHI ; BAO XINJIN ; GONG GUOLONG</creatorcontrib><description>A watchdog circuit capable of configuring reset duration and timing duration comprises: a watchdog chip, a binary counter chip, an RC charging and discharging circuit, a triode unit, a PMOSS tube unitand a power supply unit, the watchdog chip is connected with the binary counter chip, the binary counter chip is connected with the RC charging and discharging circuit, and the power supply unit is connected with the RC charging and discharging circuit. The triode unit is connected with the binary counter chip, the PMOSS tube unit is connected with the triode unit, and the power supply unit is respectively connected with the watchdog chip, the binary counter chip, the RC charging and discharging circuit, the triode unit and the PMOSS tube unit. Compared with the prior art, the watchdog systemhas the advantages that the timing duration and the reset market duration can be set, the watchdog system is matched with the monitored single-chip microcomputer system, reset/restart of the single-chip microcomputer system i</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; COUNTING MECHANISMS ; COUNTING OF OBJECTS NOT OTHERWISE PROVIDED FOR ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210316&amp;DB=EPODOC&amp;CC=CN&amp;NR=112506694A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210316&amp;DB=EPODOC&amp;CC=CN&amp;NR=112506694A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LIU XUZHI</creatorcontrib><creatorcontrib>BAO XINJIN</creatorcontrib><creatorcontrib>GONG GUOLONG</creatorcontrib><title>Watchdog circuit capable of configuring reset duration and timing duration</title><description>A watchdog circuit capable of configuring reset duration and timing duration comprises: a watchdog chip, a binary counter chip, an RC charging and discharging circuit, a triode unit, a PMOSS tube unitand a power supply unit, the watchdog chip is connected with the binary counter chip, the binary counter chip is connected with the RC charging and discharging circuit, and the power supply unit is connected with the RC charging and discharging circuit. The triode unit is connected with the binary counter chip, the PMOSS tube unit is connected with the triode unit, and the power supply unit is respectively connected with the watchdog chip, the binary counter chip, the RC charging and discharging circuit, the triode unit and the PMOSS tube unit. Compared with the prior art, the watchdog systemhas the advantages that the timing duration and the reset market duration can be set, the watchdog system is matched with the monitored single-chip microcomputer system, reset/restart of the single-chip microcomputer system i</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>COUNTING MECHANISMS</subject><subject>COUNTING OF OBJECTS NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAKTyxJzkjJT1dIzixKLs0sUUhOLEhMyklVyE9TSM7PS8tMLy3KzEtXKEotTi1RSCktSizJzM9TSMxLUSjJzAXJwMR4GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakm8s5-hoZGpgZmZpYmjMTFqAD6WNVs</recordid><startdate>20210316</startdate><enddate>20210316</enddate><creator>LIU XUZHI</creator><creator>BAO XINJIN</creator><creator>GONG GUOLONG</creator><scope>EVB</scope></search><sort><creationdate>20210316</creationdate><title>Watchdog circuit capable of configuring reset duration and timing duration</title><author>LIU XUZHI ; BAO XINJIN ; GONG GUOLONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN112506694A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2021</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>COUNTING MECHANISMS</topic><topic>COUNTING OF OBJECTS NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>LIU XUZHI</creatorcontrib><creatorcontrib>BAO XINJIN</creatorcontrib><creatorcontrib>GONG GUOLONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIU XUZHI</au><au>BAO XINJIN</au><au>GONG GUOLONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Watchdog circuit capable of configuring reset duration and timing duration</title><date>2021-03-16</date><risdate>2021</risdate><abstract>A watchdog circuit capable of configuring reset duration and timing duration comprises: a watchdog chip, a binary counter chip, an RC charging and discharging circuit, a triode unit, a PMOSS tube unitand a power supply unit, the watchdog chip is connected with the binary counter chip, the binary counter chip is connected with the RC charging and discharging circuit, and the power supply unit is connected with the RC charging and discharging circuit. The triode unit is connected with the binary counter chip, the PMOSS tube unit is connected with the triode unit, and the power supply unit is respectively connected with the watchdog chip, the binary counter chip, the RC charging and discharging circuit, the triode unit and the PMOSS tube unit. Compared with the prior art, the watchdog systemhas the advantages that the timing duration and the reset market duration can be set, the watchdog system is matched with the monitored single-chip microcomputer system, reset/restart of the single-chip microcomputer system i</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
COUNTING MECHANISMS
COUNTING OF OBJECTS NOT OTHERWISE PROVIDED FOR
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Watchdog circuit capable of configuring reset duration and timing duration
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