Miniature memory packaging structure and memory packaging structure
The invention provides a miniature memory packaging structure. The miniature memory packaging structure comprises a circuit substrate, a first chip, a second chip and a packaging colloid, the circuitsubstrate is provided with a first surface, a second surface opposite to the first surface and a cond...
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| creator | QI ZHONGBANG ZHANG JIAHAO LU DONGBAO XU ZIHAN |
| description | The invention provides a miniature memory packaging structure. The miniature memory packaging structure comprises a circuit substrate, a first chip, a second chip and a packaging colloid, the circuitsubstrate is provided with a first surface, a second surface opposite to the first surface and a conductive pattern located on the second surface. The first chip is disposed on the first surface. Thefirst chip is provided with a first active surface far away from the first surface and a redistribution circuit layer located on the first active surface, and the redistribution circuit layer is electrically connected with the circuit substrate. The second chip is disposed on the first active surface and electrically connected to the redistribution layer. The second chip has a second active surface facing the first active surface. The packaging colloid is disposed on the first surface and covers the first chip and the second chip. The invention further provides a memory packaging structure with a antenna.
本发明提供一种微型存储器封 |
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本发明提供一种微型存储器封</description><subject>ANTENNAS, i.e. RADIO AERIALS</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHD2zczLTCwpLUpVyE3NzS-qVChITM5OTM_MS1coLikqTQZLJeal4JHmYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxUAdqXmpJfHOfoaGRiYm5mYWZo7GxKgBAODFM1c</recordid><startdate>20210305</startdate><enddate>20210305</enddate><creator>QI ZHONGBANG</creator><creator>ZHANG JIAHAO</creator><creator>LU DONGBAO</creator><creator>XU ZIHAN</creator><scope>EVB</scope></search><sort><creationdate>20210305</creationdate><title>Miniature memory packaging structure and memory packaging structure</title><author>QI ZHONGBANG ; ZHANG JIAHAO ; LU DONGBAO ; XU ZIHAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN112447686A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2021</creationdate><topic>ANTENNAS, i.e. RADIO AERIALS</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>QI ZHONGBANG</creatorcontrib><creatorcontrib>ZHANG JIAHAO</creatorcontrib><creatorcontrib>LU DONGBAO</creatorcontrib><creatorcontrib>XU ZIHAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>QI ZHONGBANG</au><au>ZHANG JIAHAO</au><au>LU DONGBAO</au><au>XU ZIHAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Miniature memory packaging structure and memory packaging structure</title><date>2021-03-05</date><risdate>2021</risdate><abstract>The invention provides a miniature memory packaging structure. The miniature memory packaging structure comprises a circuit substrate, a first chip, a second chip and a packaging colloid, the circuitsubstrate is provided with a first surface, a second surface opposite to the first surface and a conductive pattern located on the second surface. The first chip is disposed on the first surface. Thefirst chip is provided with a first active surface far away from the first surface and a redistribution circuit layer located on the first active surface, and the redistribution circuit layer is electrically connected with the circuit substrate. The second chip is disposed on the first active surface and electrically connected to the redistribution layer. The second chip has a second active surface facing the first active surface. The packaging colloid is disposed on the first surface and covers the first chip and the second chip. The invention further provides a memory packaging structure with a antenna.
本发明提供一种微型存储器封</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | ANTENNAS, i.e. RADIO AERIALS BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Miniature memory packaging structure and memory packaging structure |
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