Semiconductor structure and forming method thereof
The invention discloses a semiconductor structure and a forming method thereof .The method comprises the steps: providing a substrate, and enabling the surface of the substrate to be provided with a first dielectric layer; forming a first opening in the first dielectric layer, wherein a part of the...
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| creator | TAN JINGJING XU ZENGSHENG ZHANG TIANTIAN ZHANG HAO GUO WEN JING XUEZHEN |
| description | The invention discloses a semiconductor structure and a forming method thereof .The method comprises the steps: providing a substrate, and enabling the surface of the substrate to be provided with a first dielectric layer; forming a first opening in the first dielectric layer, wherein a part of the surface of the substrate is exposed from the bottom of the first opening; forming an initial first plug in the first opening; etching back the initial first plug, and forming a groove and a first plug located at the bottom of the groove in the first dielectric layer; forming a second plug in the groove, wherein the material of the first plug is different from that of the second plug; forming a second dielectric layer on the surfaces of the second plug and the first dielectric layer; etching a part of the second dielectric layer, forming a second opening in the second dielectric layer, and exposing the top surface of the second plug from the bottom of the second opening; and forming a third plug in the second openin |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN112349651A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN112349651A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN112349651A3</originalsourceid><addsrcrecordid>eNrjZDAKTs3NTM7PSylNLskvUiguKQIySotSFRLzUhTS8otyM_PSFXJTSzLyUxRKMlKLUvPTeBhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJvLOfoaGRsYmlmamhozExagAPMiyc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor structure and forming method thereof</title><source>esp@cenet</source><creator>TAN JINGJING ; XU ZENGSHENG ; ZHANG TIANTIAN ; ZHANG HAO ; GUO WEN ; JING XUEZHEN</creator><creatorcontrib>TAN JINGJING ; XU ZENGSHENG ; ZHANG TIANTIAN ; ZHANG HAO ; GUO WEN ; JING XUEZHEN</creatorcontrib><description>The invention discloses a semiconductor structure and a forming method thereof .The method comprises the steps: providing a substrate, and enabling the surface of the substrate to be provided with a first dielectric layer; forming a first opening in the first dielectric layer, wherein a part of the surface of the substrate is exposed from the bottom of the first opening; forming an initial first plug in the first opening; etching back the initial first plug, and forming a groove and a first plug located at the bottom of the groove in the first dielectric layer; forming a second plug in the groove, wherein the material of the first plug is different from that of the second plug; forming a second dielectric layer on the surfaces of the second plug and the first dielectric layer; etching a part of the second dielectric layer, forming a second opening in the second dielectric layer, and exposing the top surface of the second plug from the bottom of the second opening; and forming a third plug in the second openin</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210209&DB=EPODOC&CC=CN&NR=112349651A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210209&DB=EPODOC&CC=CN&NR=112349651A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TAN JINGJING</creatorcontrib><creatorcontrib>XU ZENGSHENG</creatorcontrib><creatorcontrib>ZHANG TIANTIAN</creatorcontrib><creatorcontrib>ZHANG HAO</creatorcontrib><creatorcontrib>GUO WEN</creatorcontrib><creatorcontrib>JING XUEZHEN</creatorcontrib><title>Semiconductor structure and forming method thereof</title><description>The invention discloses a semiconductor structure and a forming method thereof .The method comprises the steps: providing a substrate, and enabling the surface of the substrate to be provided with a first dielectric layer; forming a first opening in the first dielectric layer, wherein a part of the surface of the substrate is exposed from the bottom of the first opening; forming an initial first plug in the first opening; etching back the initial first plug, and forming a groove and a first plug located at the bottom of the groove in the first dielectric layer; forming a second plug in the groove, wherein the material of the first plug is different from that of the second plug; forming a second dielectric layer on the surfaces of the second plug and the first dielectric layer; etching a part of the second dielectric layer, forming a second opening in the second dielectric layer, and exposing the top surface of the second plug from the bottom of the second opening; and forming a third plug in the second openin</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAKTs3NTM7PSylNLskvUiguKQIySotSFRLzUhTS8otyM_PSFXJTSzLyUxRKMlKLUvPTeBhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJvLOfoaGRsYmlmamhozExagAPMiyc</recordid><startdate>20210209</startdate><enddate>20210209</enddate><creator>TAN JINGJING</creator><creator>XU ZENGSHENG</creator><creator>ZHANG TIANTIAN</creator><creator>ZHANG HAO</creator><creator>GUO WEN</creator><creator>JING XUEZHEN</creator><scope>EVB</scope></search><sort><creationdate>20210209</creationdate><title>Semiconductor structure and forming method thereof</title><author>TAN JINGJING ; XU ZENGSHENG ; ZHANG TIANTIAN ; ZHANG HAO ; GUO WEN ; JING XUEZHEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN112349651A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2021</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>TAN JINGJING</creatorcontrib><creatorcontrib>XU ZENGSHENG</creatorcontrib><creatorcontrib>ZHANG TIANTIAN</creatorcontrib><creatorcontrib>ZHANG HAO</creatorcontrib><creatorcontrib>GUO WEN</creatorcontrib><creatorcontrib>JING XUEZHEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TAN JINGJING</au><au>XU ZENGSHENG</au><au>ZHANG TIANTIAN</au><au>ZHANG HAO</au><au>GUO WEN</au><au>JING XUEZHEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor structure and forming method thereof</title><date>2021-02-09</date><risdate>2021</risdate><abstract>The invention discloses a semiconductor structure and a forming method thereof .The method comprises the steps: providing a substrate, and enabling the surface of the substrate to be provided with a first dielectric layer; forming a first opening in the first dielectric layer, wherein a part of the surface of the substrate is exposed from the bottom of the first opening; forming an initial first plug in the first opening; etching back the initial first plug, and forming a groove and a first plug located at the bottom of the groove in the first dielectric layer; forming a second plug in the groove, wherein the material of the first plug is different from that of the second plug; forming a second dielectric layer on the surfaces of the second plug and the first dielectric layer; etching a part of the second dielectric layer, forming a second opening in the second dielectric layer, and exposing the top surface of the second plug from the bottom of the second opening; and forming a third plug in the second openin</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Semiconductor structure and forming method thereof |
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