Dynamic biasing circuit applied to ultralow quiescent current LDO

Dynamic biasing circuit applied to ultralow quiescent current LDO

The invention provides a dynamic bias circuit applied to an ultralow quiescent current LDO, which comprises an operational amplifier AMP, a power tube MP, MOS tubes MP1, MP2, MP3, MPX, MN1, MN2 and MN3; the inverting input end of the operational amplifier AMP is connected with a reference voltage Vr...

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Hauptverfasser: FENG GUANGTAO, XIANG JUN
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Sprache:chi ; eng
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CONTROLLING
PHYSICS
REGULATING
SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
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creator FENG GUANGTAO
XIANG JUN
description The invention provides a dynamic bias circuit applied to an ultralow quiescent current LDO, which comprises an operational amplifier AMP, a power tube MP, MOS tubes MP1, MP2, MP3, MPX, MN1, MN2 and MN3; the inverting input end of the operational amplifier AMP is connected with a reference voltage Vref, the non-inverting input end of the operational amplifier AMP is connected with a voltage feedback Vfb, and the grid electrode of the power tube MP is connected with the output end of the operational amplifier AMP; and the drain electrode of the power tube MP is connected with a working voltage Vdd; according to the scheme, by setting the upper limit and the lower limit of the dynamic current, the dynamic bias problem of the LDO with the ultralow quiescent current is solved, and bias of the LDO with the ultralow quiescent current in a no-load state and bias current controllability in a heavy load state are achieved. 本发明提供一种应用于超低静态电流LDO的动态偏置电路，其包括运算放大器AMP、功率管MP、MOS管MP1、MP2、MP3、MPX、MN1、MN2以及MN3，所述运算放大器AMP的反相输入端与基准
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the inverting input end of the operational amplifier AMP is connected with a reference voltage Vref, the non-inverting input end of the operational amplifier AMP is connected with a voltage feedback Vfb, and the grid electrode of the power tube MP is connected with the output end of the operational amplifier AMP; and the drain electrode of the power tube MP is connected with a working voltage Vdd; according to the scheme, by setting the upper limit and the lower limit of the dynamic current, the dynamic bias problem of the LDO with the ultralow quiescent current is solved, and bias of the LDO with the ultralow quiescent current in a no-load state and bias current controllability in a heavy load state are achieved. 本发明提供一种应用于超低静态电流LDO的动态偏置电路，其包括运算放大器AMP、功率管MP、MOS管MP1、MP2、MP3、MPX、MN1、MN2以及MN3，所述运算放大器AMP的反相输入端与基准</description><language>chi ; eng</language><subject>CONTROLLING ; PHYSICS ; REGULATING ; SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20201103&amp;DB=EPODOC&amp;CC=CN&amp;NR=111880596A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20201103&amp;DB=EPODOC&amp;CC=CN&amp;NR=111880596A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FENG GUANGTAO</creatorcontrib><creatorcontrib>XIANG JUN</creatorcontrib><title>Dynamic biasing circuit applied to ultralow quiescent current LDO</title><description>The invention provides a dynamic bias circuit applied to an ultralow quiescent current LDO, which comprises an operational amplifier AMP, a power tube MP, MOS tubes MP1, MP2, MP3, MPX, MN1, MN2 and MN3; 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subjects CONTROLLING
PHYSICS
REGULATING
SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
title Dynamic biasing circuit applied to ultralow quiescent current LDO
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