ADDRESS TRANSLATION IN A DATA PROCESSING APPARATUS
An apparatus comprises address translation circuitry (70) to perform a translation of a virtual address (80) comprising a virtual tag portion (88) and a virtual address portion (86) into a physical address (82) comprising a physical tag portion (92) and a physical address portion (90). The address t...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | MARINAS CATALIN WILLIAM JAMES DEACON BARNES GRAEME |
description | An apparatus comprises address translation circuitry (70) to perform a translation of a virtual address (80) comprising a virtual tag portion (88) and a virtual address portion (86) into a physical address (82) comprising a physical tag portion (92) and a physical address portion (90). The address translation circuitry comprises address tag translation circuitry (72) to perform a translation of the virtual tag portion into the physical tag portion and the address translation to be performed is selected in dependence on the virtual address.
一种包括地址转换电路(70)的装置,该地址转换电路(70)用于执行虚拟地址(80)到物理地址(82)的转换,该虚拟地址(80)包括虚拟标签部分(88)和虚拟地址部分(86),该物理地址(82)包括物理标签部分(92)和物理地址部分(90)。地址转换电路包括地址标签转换电路(72),该地址标签转换电路(72)用于执行该虚拟标签部分到该物理标签部分的转换,并且要执行的该地址转换是根据虚拟地址而选择的。 |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN111527480A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN111527480A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN111527480A3</originalsourceid><addsrcrecordid>eNrjZDBydHEJcg0OVggJcvQL9nEM8fT3U_D0U3BUcHEMcVQICPJ3Bsp6-rkrOAYEOAY5hoQG8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSSeGc_Q0NDUyNzEwsDR2Ni1AAAdHcmyA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ADDRESS TRANSLATION IN A DATA PROCESSING APPARATUS</title><source>esp@cenet</source><creator>MARINAS CATALIN ; WILLIAM JAMES DEACON ; BARNES GRAEME</creator><creatorcontrib>MARINAS CATALIN ; WILLIAM JAMES DEACON ; BARNES GRAEME</creatorcontrib><description>An apparatus comprises address translation circuitry (70) to perform a translation of a virtual address (80) comprising a virtual tag portion (88) and a virtual address portion (86) into a physical address (82) comprising a physical tag portion (92) and a physical address portion (90). The address translation circuitry comprises address tag translation circuitry (72) to perform a translation of the virtual tag portion into the physical tag portion and the address translation to be performed is selected in dependence on the virtual address.
一种包括地址转换电路(70)的装置,该地址转换电路(70)用于执行虚拟地址(80)到物理地址(82)的转换,该虚拟地址(80)包括虚拟标签部分(88)和虚拟地址部分(86),该物理地址(82)包括物理标签部分(92)和物理地址部分(90)。地址转换电路包括地址标签转换电路(72),该地址标签转换电路(72)用于执行该虚拟标签部分到该物理标签部分的转换,并且要执行的该地址转换是根据虚拟地址而选择的。</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200811&DB=EPODOC&CC=CN&NR=111527480A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200811&DB=EPODOC&CC=CN&NR=111527480A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MARINAS CATALIN</creatorcontrib><creatorcontrib>WILLIAM JAMES DEACON</creatorcontrib><creatorcontrib>BARNES GRAEME</creatorcontrib><title>ADDRESS TRANSLATION IN A DATA PROCESSING APPARATUS</title><description>An apparatus comprises address translation circuitry (70) to perform a translation of a virtual address (80) comprising a virtual tag portion (88) and a virtual address portion (86) into a physical address (82) comprising a physical tag portion (92) and a physical address portion (90). The address translation circuitry comprises address tag translation circuitry (72) to perform a translation of the virtual tag portion into the physical tag portion and the address translation to be performed is selected in dependence on the virtual address.
一种包括地址转换电路(70)的装置,该地址转换电路(70)用于执行虚拟地址(80)到物理地址(82)的转换,该虚拟地址(80)包括虚拟标签部分(88)和虚拟地址部分(86),该物理地址(82)包括物理标签部分(92)和物理地址部分(90)。地址转换电路包括地址标签转换电路(72),该地址标签转换电路(72)用于执行该虚拟标签部分到该物理标签部分的转换,并且要执行的该地址转换是根据虚拟地址而选择的。</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDBydHEJcg0OVggJcvQL9nEM8fT3U_D0U3BUcHEMcVQICPJ3Bsp6-rkrOAYEOAY5hoQG8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSSeGc_Q0NDUyNzEwsDR2Ni1AAAdHcmyA</recordid><startdate>20200811</startdate><enddate>20200811</enddate><creator>MARINAS CATALIN</creator><creator>WILLIAM JAMES DEACON</creator><creator>BARNES GRAEME</creator><scope>EVB</scope></search><sort><creationdate>20200811</creationdate><title>ADDRESS TRANSLATION IN A DATA PROCESSING APPARATUS</title><author>MARINAS CATALIN ; WILLIAM JAMES DEACON ; BARNES GRAEME</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN111527480A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2020</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>MARINAS CATALIN</creatorcontrib><creatorcontrib>WILLIAM JAMES DEACON</creatorcontrib><creatorcontrib>BARNES GRAEME</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MARINAS CATALIN</au><au>WILLIAM JAMES DEACON</au><au>BARNES GRAEME</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ADDRESS TRANSLATION IN A DATA PROCESSING APPARATUS</title><date>2020-08-11</date><risdate>2020</risdate><abstract>An apparatus comprises address translation circuitry (70) to perform a translation of a virtual address (80) comprising a virtual tag portion (88) and a virtual address portion (86) into a physical address (82) comprising a physical tag portion (92) and a physical address portion (90). The address translation circuitry comprises address tag translation circuitry (72) to perform a translation of the virtual tag portion into the physical tag portion and the address translation to be performed is selected in dependence on the virtual address.
一种包括地址转换电路(70)的装置,该地址转换电路(70)用于执行虚拟地址(80)到物理地址(82)的转换,该虚拟地址(80)包括虚拟标签部分(88)和虚拟地址部分(86),该物理地址(82)包括物理标签部分(92)和物理地址部分(90)。地址转换电路包括地址标签转换电路(72),该地址标签转换电路(72)用于执行该虚拟标签部分到该物理标签部分的转换,并且要执行的该地址转换是根据虚拟地址而选择的。</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_CN111527480A |
source | esp@cenet |
subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | ADDRESS TRANSLATION IN A DATA PROCESSING APPARATUS |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-28T17%3A52%3A50IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MARINAS%20CATALIN&rft.date=2020-08-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN111527480A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |