System and method of floating point multiply operation processing

A processor includes an integer multiplier configured to execute an integer multiply instruction to multiply significand bits of at least one floating point operand of a floating point multiply operation. The processor also includes a floating point multiplier configured to execute a special purpose...

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Bibliographische Detailangaben
Hauptverfasser: MAHURIN ERIC, PLONDKE ERICH, DANYSH ALBERT
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:A processor includes an integer multiplier configured to execute an integer multiply instruction to multiply significand bits of at least one floating point operand of a floating point multiply operation. The processor also includes a floating point multiplier configured to execute a special purpose floating point multiply accumulate instruction with respect to an intermediate result of the floating point multiply operation and the at least one floating point operand to generate a final floating point multiplication result. 处理器包括整数乘法器,整数乘法器被配置为执行整数乘法指令来将浮点乘法运算的至少一个浮点操作数的有效数字位相乘。该处理器还包括浮点乘法器,浮点乘法器被配置为关于浮点乘法运算的中间结果以及至少一个浮点操作数来执行专用浮点乘法累加指令,以生成最终的浮点乘法结果。