Track system and method for processing semiconductor wafers
The present disclosure provides a track system for processing semiconductor wafers held by a plurality of front opening universal pods (FOUPs). The track system includes a process zone, a first commonzone, and a second common zone. The process zone includes a first group of process modules and a sec...
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| creator | JANG SUNGKUN LIM JONG-KILL KWON BYUNG-IN |
| description | The present disclosure provides a track system for processing semiconductor wafers held by a plurality of front opening universal pods (FOUPs). The track system includes a process zone, a first commonzone, and a second common zone. The process zone includes a first group of process modules and a second group of process modules. The first common zone is coupled to the first group of process modules of the process zone. The first common zone includes a first robot and at least two first FOUP ports. The second common zone is coupled to the second group of process modules of the process zone. Thesecond common zone includes a second robot and at least two second FOUP ports.
本发明提供了一种用于处理多个由前开式晶圆传送盒(FOUP)承载的半导体晶圆的光刻胶涂布及显影系统。光刻胶涂布及显影系统包括处理区域、第一公共区域以及第二公共区域。处理区域包括第一组处理模块和第二组处理模块。第一公共区域联接至处理区域的第一组处理模块。第一公共区域包括第一机械手和至少两个第一FOUP端口。第二公共区域联接至处理区域的第二组处理模块。第二公共区域包括第二机械手和至少两个第二FOUP端口。本发明还提供一种处理多个由前开式晶圆传送盒(FOUP)承载的半导体晶圆的方法。 |
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本发明提供了一种用于处理多个由前开式晶圆传送盒(FOUP)承载的半导体晶圆的光刻胶涂布及显影系统。光刻胶涂布及显影系统包括处理区域、第一公共区域以及第二公共区域。处理区域包括第一组处理模块和第二组处理模块。第一公共区域联接至处理区域的第一组处理模块。第一公共区域包括第一机械手和至少两个第一FOUP端口。第二公共区域联接至处理区域的第二组处理模块。第二公共区域包括第二机械手和至少两个第二FOUP端口。本发明还提供一种处理多个由前开式晶圆传送盒(FOUP)承载的半导体晶圆的方法。</description><language>chi ; eng</language><subject>APPARATUS SPECIALLY ADAPTED THEREFOR ; BASIC ELECTRIC ELEMENTS ; CINEMATOGRAPHY ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; ELECTROGRAPHY ; HOLOGRAPHY ; MATERIALS THEREFOR ; ORIGINALS THEREFOR ; PHOTOGRAPHY ; PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES ; PHYSICS ; SEMICONDUCTOR DEVICES</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200623&DB=EPODOC&CC=CN&NR=111326450A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200623&DB=EPODOC&CC=CN&NR=111326450A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JANG SUNGKUN</creatorcontrib><creatorcontrib>LIM JONG-KILL</creatorcontrib><creatorcontrib>KWON BYUNG-IN</creatorcontrib><title>Track system and method for processing semiconductor wafers</title><description>The present disclosure provides a track system for processing semiconductor wafers held by a plurality of front opening universal pods (FOUPs). The track system includes a process zone, a first commonzone, and a second common zone. The process zone includes a first group of process modules and a second group of process modules. The first common zone is coupled to the first group of process modules of the process zone. The first common zone includes a first robot and at least two first FOUP ports. The second common zone is coupled to the second group of process modules of the process zone. Thesecond common zone includes a second robot and at least two second FOUP ports.
本发明提供了一种用于处理多个由前开式晶圆传送盒(FOUP)承载的半导体晶圆的光刻胶涂布及显影系统。光刻胶涂布及显影系统包括处理区域、第一公共区域以及第二公共区域。处理区域包括第一组处理模块和第二组处理模块。第一公共区域联接至处理区域的第一组处理模块。第一公共区域包括第一机械手和至少两个第一FOUP端口。第二公共区域联接至处理区域的第二组处理模块。第二公共区域包括第二机械手和至少两个第二FOUP端口。本发明还提供一种处理多个由前开式晶圆传送盒(FOUP)承载的半导体晶圆的方法。</description><subject>APPARATUS SPECIALLY ADAPTED THEREFOR</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CINEMATOGRAPHY</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>ELECTROGRAPHY</subject><subject>HOLOGRAPHY</subject><subject>MATERIALS THEREFOR</subject><subject>ORIGINALS THEREFOR</subject><subject>PHOTOGRAPHY</subject><subject>PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAOKUpMzlYoriwuSc1VSMxLUchNLcnIT1FIyy9SKCjKT04tLs7MS1coTs3NTM7PSylNLgFKlCempRYV8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSSeGc_Q0NDYyMzE1MDR2Ni1AAA1s0vyQ</recordid><startdate>20200623</startdate><enddate>20200623</enddate><creator>JANG SUNGKUN</creator><creator>LIM JONG-KILL</creator><creator>KWON BYUNG-IN</creator><scope>EVB</scope></search><sort><creationdate>20200623</creationdate><title>Track system and method for processing semiconductor wafers</title><author>JANG SUNGKUN ; LIM JONG-KILL ; KWON BYUNG-IN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN111326450A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2020</creationdate><topic>APPARATUS SPECIALLY ADAPTED THEREFOR</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CINEMATOGRAPHY</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>ELECTROGRAPHY</topic><topic>HOLOGRAPHY</topic><topic>MATERIALS THEREFOR</topic><topic>ORIGINALS THEREFOR</topic><topic>PHOTOGRAPHY</topic><topic>PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>JANG SUNGKUN</creatorcontrib><creatorcontrib>LIM JONG-KILL</creatorcontrib><creatorcontrib>KWON BYUNG-IN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JANG SUNGKUN</au><au>LIM JONG-KILL</au><au>KWON BYUNG-IN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Track system and method for processing semiconductor wafers</title><date>2020-06-23</date><risdate>2020</risdate><abstract>The present disclosure provides a track system for processing semiconductor wafers held by a plurality of front opening universal pods (FOUPs). The track system includes a process zone, a first commonzone, and a second common zone. The process zone includes a first group of process modules and a second group of process modules. The first common zone is coupled to the first group of process modules of the process zone. The first common zone includes a first robot and at least two first FOUP ports. The second common zone is coupled to the second group of process modules of the process zone. Thesecond common zone includes a second robot and at least two second FOUP ports.
本发明提供了一种用于处理多个由前开式晶圆传送盒(FOUP)承载的半导体晶圆的光刻胶涂布及显影系统。光刻胶涂布及显影系统包括处理区域、第一公共区域以及第二公共区域。处理区域包括第一组处理模块和第二组处理模块。第一公共区域联接至处理区域的第一组处理模块。第一公共区域包括第一机械手和至少两个第一FOUP端口。第二公共区域联接至处理区域的第二组处理模块。第二公共区域包括第二机械手和至少两个第二FOUP端口。本发明还提供一种处理多个由前开式晶圆传送盒(FOUP)承载的半导体晶圆的方法。</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | APPARATUS SPECIALLY ADAPTED THEREFOR BASIC ELECTRIC ELEMENTS CINEMATOGRAPHY ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY ELECTROGRAPHY HOLOGRAPHY MATERIALS THEREFOR ORIGINALS THEREFOR PHOTOGRAPHY PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES PHYSICS SEMICONDUCTOR DEVICES |
| title | Track system and method for processing semiconductor wafers |
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