METHOD FOR MANUFACTURING NON-VOLATILE MEMORY

A method for manufacturing a non-volatile memory, comprising the following steps: forming a gate oxide layer (60) on a substrate (50); forming a stacked capacitor of a memory unit by subjecting logicgate polycrystalline silicon (10, 10') to a deposition process at least twice; removing excess l...

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NING DAN
description A method for manufacturing a non-volatile memory, comprising the following steps: forming a gate oxide layer (60) on a substrate (50); forming a stacked capacitor of a memory unit by subjecting logicgate polycrystalline silicon (10, 10') to a deposition process at least twice; removing excess logic gate polycrystalline silicon (10, 10') by means of an etching process to form a memory transistor and a peripheral logic transistor. By forming a stacked capacitor of a memory unit by means of at least two deposition processes, the method manufactures a memory during a standard logic process such that the process for manufacturing a memory is simpler, has good compatibility with logic processes and is low cost. 一种非挥发性存储器的制造方法,包括步骤:在基底(50)上形成栅氧化层(60);将逻辑栅极多晶硅(10,10')通过至少两次沉积过程后,形成存储单元的叠层电容;通过蚀刻工艺移除多余的逻辑栅极多晶硅(10,10'),形成存储晶体管和外围逻辑晶体管。本发明所述方法,通过至少两次沉积形成存储晶体管的叠层电容,于标准逻辑工艺中制造出存储器,使得存储器的制造工艺更简单,与逻辑工艺兼容性好,成本低。
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By forming a stacked capacitor of a memory unit by means of at least two deposition processes, the method manufactures a memory during a standard logic process such that the process for manufacturing a memory is simpler, has good compatibility with logic processes and is low cost. 一种非挥发性存储器的制造方法,包括步骤:在基底(50)上形成栅氧化层(60);将逻辑栅极多晶硅(10,10')通过至少两次沉积过程后,形成存储单元的叠层电容;通过蚀刻工艺移除多余的逻辑栅极多晶硅(10,10'),形成存储晶体管和外围逻辑晶体管。本发明所述方法,通过至少两次沉积形成存储晶体管的叠层电容,于标准逻辑工艺中制造出存储器,使得存储器的制造工艺更简单,与逻辑工艺兼容性好,成本低。</description><language>chi ; eng</language><subject>ELECTRICITY</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200619&amp;DB=EPODOC&amp;CC=CN&amp;NR=111316439A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20200619&amp;DB=EPODOC&amp;CC=CN&amp;NR=111316439A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WANG TENGFENG</creatorcontrib><creatorcontrib>NING DAN</creatorcontrib><title>METHOD FOR MANUFACTURING NON-VOLATILE MEMORY</title><description>A method for manufacturing a non-volatile memory, comprising the following steps: forming a gate oxide layer (60) on a substrate (50); forming a stacked capacitor of a memory unit by subjecting logicgate polycrystalline silicon (10, 10') to a deposition process at least twice; removing excess logic gate polycrystalline silicon (10, 10') by means of an etching process to form a memory transistor and a peripheral logic transistor. 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