Integrated circuit packaging element and carrier plate thereof
The invention discloses an integrated circuit packaging element and a carrier plate thereof. The integrated circuit packaging element includes a wafer element and a packaging module. The wafer elementcomprises two driving units. The packaging module is connected with the wafer element and comprises...
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| creator | LIN YUANHONG WAN SI'AI YANG SHENGFAN SUN YUCHENG |
| description | The invention discloses an integrated circuit packaging element and a carrier plate thereof. The integrated circuit packaging element includes a wafer element and a packaging module. The wafer elementcomprises two driving units. The packaging module is connected with the wafer element and comprises two power supply wiring networks and a grounding shielding structure. The power supply wiring network is electrically connected with the driving units. The grounding shielding structure is arranged between the two power supply wiring networks and used for blocking power supply noise coupling generated by the two power supply wiring networks. Thus, through the above structure, the power supply noise coupling generated between the two power supply wiring networks is reduced, the signal jitter ofthe output end of the wafer element is further reduced, and the noise isolation and the signal integrity of the wafer element are improved.
一种集成电路封装元件及其载板。集成电路封装元件包含一晶片元件与一封装模块。晶片元件包含二驱动单元。封装模块连接晶片元件，包含二电源布线网络与一接地屏蔽结构。电源布线网络分别 |
| format | Patent |
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一种集成电路封装元件及其载板。集成电路封装元件包含一晶片元件与一封装模块。晶片元件包含二驱动单元。封装模块连接晶片元件，包含二电源布线网络与一接地屏蔽结构。电源布线网络分别</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLDzzCtJTS9KLElNUUjOLEouzSxRKEhMzk5Mz8xLV0jNSc1NzStRSMwDyiYWFWWmFikU5AAVK5RkpBal5qfxMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjUYqBJqXmpJfHOfoaGhsaGRmaWRo7GxKgBAGn0MKA</recordid><startdate>20200619</startdate><enddate>20200619</enddate><creator>LIN YUANHONG</creator><creator>WAN SI'AI</creator><creator>YANG SHENGFAN</creator><creator>SUN YUCHENG</creator><scope>EVB</scope></search><sort><creationdate>20200619</creationdate><title>Integrated circuit packaging element and carrier plate thereof</title><author>LIN YUANHONG ; WAN SI'AI ; YANG SHENGFAN ; SUN YUCHENG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN111312692A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2020</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LIN YUANHONG</creatorcontrib><creatorcontrib>WAN SI'AI</creatorcontrib><creatorcontrib>YANG SHENGFAN</creatorcontrib><creatorcontrib>SUN YUCHENG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIN YUANHONG</au><au>WAN SI'AI</au><au>YANG SHENGFAN</au><au>SUN YUCHENG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Integrated circuit packaging element and carrier plate thereof</title><date>2020-06-19</date><risdate>2020</risdate><abstract>The invention discloses an integrated circuit packaging element and a carrier plate thereof. The integrated circuit packaging element includes a wafer element and a packaging module. The wafer elementcomprises two driving units. The packaging module is connected with the wafer element and comprises two power supply wiring networks and a grounding shielding structure. The power supply wiring network is electrically connected with the driving units. The grounding shielding structure is arranged between the two power supply wiring networks and used for blocking power supply noise coupling generated by the two power supply wiring networks. Thus, through the above structure, the power supply noise coupling generated between the two power supply wiring networks is reduced, the signal jitter ofthe output end of the wafer element is further reduced, and the noise isolation and the signal integrity of the wafer element are improved.
一种集成电路封装元件及其载板。集成电路封装元件包含一晶片元件与一封装模块。晶片元件包含二驱动单元。封装模块连接晶片元件，包含二电源布线网络与一接地屏蔽结构。电源布线网络分别</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Integrated circuit packaging element and carrier plate thereof |
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