INTEGRATED CIRCUIT AND CLOCK AND DATA RECOVERY CIRCUIT INCLUDING THE INTEGRATED CIRCUIT
An integrated circuit includes: a phase-shifted data signal generation circuit configured to generate a plurality of phase-shifted data signals from an input data signal based on at least one phase-shifted clock signal; a synchronization circuit configured to generate a plurality of synchronization...
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creator | CHOI JUNG-MYUNG KWAK MYOUNG-BO YU CHANG-ZHI BURM JIN-WOOK SHIN SEONG-KYUN SHIN JONG-SHIN LEE DAE-WUNG |
description | An integrated circuit includes: a phase-shifted data signal generation circuit configured to generate a plurality of phase-shifted data signals from an input data signal based on at least one phase-shifted clock signal; a synchronization circuit configured to generate a plurality of synchronization data signals by applying the at least one phase-shifted clock signal to the plurality of phase-shifted data signals provided by the phase-shifted data signal generation circuit; and a control signal generation circuit configured to perform logic operations on the plurality of synchronization data signals to generate a phase control signal for controlling a phase of the at least one phase-shifted clock signal, and generate a frequency control signal for controlling a frequency of the at least onephase-shifted clock signal.
一种集成电路,包括:相移数据信号生成电路,被配置为基于至少一个相移时钟信号来从输入数据信号生成多个相移数据信号;同步电路,被配置为通过将该至少一个相移时钟信号应用于由相移数据信号生成电路提供的多个相移数据信号来生成多个同步数据信号;以及控制信号生成电路,被配置为对该多个同步数据信号执行逻辑运算,以生成用于控制该至少一个相移时钟信号的相位的相位控制信号,并生成用于控制该至少一个相移时钟信号的 |
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一种集成电路,包括:相移数据信号生成电路,被配置为基于至少一个相移时钟信号来从输入数据信号生成多个相移数据信号;同步电路,被配置为通过将该至少一个相移时钟信号应用于由相移数据信号生成电路提供的多个相移数据信号来生成多个同步数据信号;以及控制信号生成电路,被配置为对该多个同步数据信号执行逻辑运算,以生成用于控制该至少一个相移时钟信号的相位的相位控制信号,并生成用于控制该至少一个相移时钟信号的</description><language>chi ; eng</language><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY</subject><creationdate>2020</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200421&DB=EPODOC&CC=CN&NR=111049516A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20200421&DB=EPODOC&CC=CN&NR=111049516A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHOI JUNG-MYUNG</creatorcontrib><creatorcontrib>KWAK MYOUNG-BO</creatorcontrib><creatorcontrib>YU CHANG-ZHI</creatorcontrib><creatorcontrib>BURM JIN-WOOK</creatorcontrib><creatorcontrib>SHIN SEONG-KYUN</creatorcontrib><creatorcontrib>SHIN JONG-SHIN</creatorcontrib><creatorcontrib>LEE DAE-WUNG</creatorcontrib><title>INTEGRATED CIRCUIT AND CLOCK AND DATA RECOVERY CIRCUIT INCLUDING THE INTEGRATED CIRCUIT</title><description>An integrated circuit includes: a phase-shifted data signal generation circuit configured to generate a plurality of phase-shifted data signals from an input data signal based on at least one phase-shifted clock signal; a synchronization circuit configured to generate a plurality of synchronization data signals by applying the at least one phase-shifted clock signal to the plurality of phase-shifted data signals provided by the phase-shifted data signal generation circuit; and a control signal generation circuit configured to perform logic operations on the plurality of synchronization data signals to generate a phase control signal for controlling a phase of the at least one phase-shifted clock signal, and generate a frequency control signal for controlling a frequency of the at least onephase-shifted clock signal.
一种集成电路,包括:相移数据信号生成电路,被配置为基于至少一个相移时钟信号来从输入数据信号生成多个相移数据信号;同步电路,被配置为通过将该至少一个相移时钟信号应用于由相移数据信号生成电路提供的多个相移数据信号来生成多个同步数据信号;以及控制信号生成电路,被配置为对该多个同步数据信号执行逻辑运算,以生成用于控制该至少一个相移时钟信号的相位的相位控制信号,并生成用于控制该至少一个相移时钟信号的</description><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2020</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZAj39AtxdQ9yDHF1UXD2DHIO9QxRcPQDsn38nb3BLBfHEEeFIFdn_zDXoEi4Gk8_Z59QF08_d4UQD1cFTEN4GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakm8s5-hoaGBiaWpoZmjMTFqAJ0nMLY</recordid><startdate>20200421</startdate><enddate>20200421</enddate><creator>CHOI JUNG-MYUNG</creator><creator>KWAK MYOUNG-BO</creator><creator>YU CHANG-ZHI</creator><creator>BURM JIN-WOOK</creator><creator>SHIN SEONG-KYUN</creator><creator>SHIN JONG-SHIN</creator><creator>LEE DAE-WUNG</creator><scope>EVB</scope></search><sort><creationdate>20200421</creationdate><title>INTEGRATED CIRCUIT AND CLOCK AND DATA RECOVERY CIRCUIT INCLUDING THE INTEGRATED CIRCUIT</title><author>CHOI JUNG-MYUNG ; KWAK MYOUNG-BO ; YU CHANG-ZHI ; BURM JIN-WOOK ; SHIN SEONG-KYUN ; SHIN JONG-SHIN ; LEE DAE-WUNG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN111049516A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2020</creationdate><topic>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>CHOI JUNG-MYUNG</creatorcontrib><creatorcontrib>KWAK MYOUNG-BO</creatorcontrib><creatorcontrib>YU CHANG-ZHI</creatorcontrib><creatorcontrib>BURM JIN-WOOK</creatorcontrib><creatorcontrib>SHIN SEONG-KYUN</creatorcontrib><creatorcontrib>SHIN JONG-SHIN</creatorcontrib><creatorcontrib>LEE DAE-WUNG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHOI JUNG-MYUNG</au><au>KWAK MYOUNG-BO</au><au>YU CHANG-ZHI</au><au>BURM JIN-WOOK</au><au>SHIN SEONG-KYUN</au><au>SHIN JONG-SHIN</au><au>LEE DAE-WUNG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INTEGRATED CIRCUIT AND CLOCK AND DATA RECOVERY CIRCUIT INCLUDING THE INTEGRATED CIRCUIT</title><date>2020-04-21</date><risdate>2020</risdate><abstract>An integrated circuit includes: a phase-shifted data signal generation circuit configured to generate a plurality of phase-shifted data signals from an input data signal based on at least one phase-shifted clock signal; a synchronization circuit configured to generate a plurality of synchronization data signals by applying the at least one phase-shifted clock signal to the plurality of phase-shifted data signals provided by the phase-shifted data signal generation circuit; and a control signal generation circuit configured to perform logic operations on the plurality of synchronization data signals to generate a phase control signal for controlling a phase of the at least one phase-shifted clock signal, and generate a frequency control signal for controlling a frequency of the at least onephase-shifted clock signal.
一种集成电路,包括:相移数据信号生成电路,被配置为基于至少一个相移时钟信号来从输入数据信号生成多个相移数据信号;同步电路,被配置为通过将该至少一个相移时钟信号应用于由相移数据信号生成电路提供的多个相移数据信号来生成多个同步数据信号;以及控制信号生成电路,被配置为对该多个同步数据信号执行逻辑运算,以生成用于控制该至少一个相移时钟信号的相位的相位控制信号,并生成用于控制该至少一个相移时钟信号的</abstract><oa>free_for_read</oa></addata></record> |
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subjects | AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRICITY |
title | INTEGRATED CIRCUIT AND CLOCK AND DATA RECOVERY CIRCUIT INCLUDING THE INTEGRATED CIRCUIT |
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