Clock recovery system

The clock recovery system (10) is provided with: a sampler part (11) for sampling received data using 2N phase clocks and outputting 2N x M sampling signals; a data selection part (102) for selectively outputting n x M restoration signals from the 2N x M sampling signals; a phase comparison part (101) for outputting a phase comparison signal for each of the n x M restoration signals on the basis of the restoration signal, a first sampling signal sampled using a first clock advanced by one or more phases from the sampling clock, and a second sampling signal sampled using a second clock delayedby one or more phases from the sampling clock; a controller part (104) for specifying n on the basis of a data rate of the received data; and a multiphase clock generation part (103) for generating and outputting the 2N phase clocks on the basis of the phase comparison signals and n. 时钟恢复系统(10)具备：采样器部(11)，以2N相的时钟对接收数据进行采样，输出2N×M个采样信号；数据选择部(102)，从2N×M个采样信号中选择n×M个复原信号并输出；相位比较部(101)，针对n×M个复原信号的每一个，基于复原信号、以比采样时钟提前一个以上相位的第1时钟进