Forming method of semiconductor structure
The invention discloses a forming method of a semiconductor structure. The method comprises the following steps: forming a laminated structure on a semiconductor substrate; forming a patterned mask layer on the laminated structure; forming a contact hole and a groove in the laminated structure; and...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | GUO GUIQI YU ZIQIANG |
description | The invention discloses a forming method of a semiconductor structure. The method comprises the following steps: forming a laminated structure on a semiconductor substrate; forming a patterned mask layer on the laminated structure; forming a contact hole and a groove in the laminated structure; and forming a second conductive channel and a third conductive channel in the contact hole and the groove, wherein the patterned mask layer comprises a contact hole pattern and a groove pattern corresponding to the first conductive channel, and the heights of the contact hole pattern and the groove pattern are set by the material and height of the first dielectric layer and the second dielectric layer. According to the method provided by the invention, a patterned mask layer is formed by adopting agray-scale photoetching method, a nanoimprint method, a gray-scale mask plate photoetching method or an ion beam gas-assisted deposition method, a semiconductor structure is etched by using dry etching, and patterns of the ma |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN110544671A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN110544671A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN110544671A3</originalsourceid><addsrcrecordid>eNrjZNB0yy_KzcxLV8hNLcnIT1HIT1MoTs3NTM7PSylNLskvUiguKQIySotSeRhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJvLOfoaGBqYmJmbmhozExagAubyki</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Forming method of semiconductor structure</title><source>esp@cenet</source><creator>GUO GUIQI ; YU ZIQIANG</creator><creatorcontrib>GUO GUIQI ; YU ZIQIANG</creatorcontrib><description>The invention discloses a forming method of a semiconductor structure. The method comprises the following steps: forming a laminated structure on a semiconductor substrate; forming a patterned mask layer on the laminated structure; forming a contact hole and a groove in the laminated structure; and forming a second conductive channel and a third conductive channel in the contact hole and the groove, wherein the patterned mask layer comprises a contact hole pattern and a groove pattern corresponding to the first conductive channel, and the heights of the contact hole pattern and the groove pattern are set by the material and height of the first dielectric layer and the second dielectric layer. According to the method provided by the invention, a patterned mask layer is formed by adopting agray-scale photoetching method, a nanoimprint method, a gray-scale mask plate photoetching method or an ion beam gas-assisted deposition method, a semiconductor structure is etched by using dry etching, and patterns of the ma</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191206&DB=EPODOC&CC=CN&NR=110544671A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191206&DB=EPODOC&CC=CN&NR=110544671A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GUO GUIQI</creatorcontrib><creatorcontrib>YU ZIQIANG</creatorcontrib><title>Forming method of semiconductor structure</title><description>The invention discloses a forming method of a semiconductor structure. The method comprises the following steps: forming a laminated structure on a semiconductor substrate; forming a patterned mask layer on the laminated structure; forming a contact hole and a groove in the laminated structure; and forming a second conductive channel and a third conductive channel in the contact hole and the groove, wherein the patterned mask layer comprises a contact hole pattern and a groove pattern corresponding to the first conductive channel, and the heights of the contact hole pattern and the groove pattern are set by the material and height of the first dielectric layer and the second dielectric layer. According to the method provided by the invention, a patterned mask layer is formed by adopting agray-scale photoetching method, a nanoimprint method, a gray-scale mask plate photoetching method or an ion beam gas-assisted deposition method, a semiconductor structure is etched by using dry etching, and patterns of the ma</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNB0yy_KzcxLV8hNLcnIT1HIT1MoTs3NTM7PSylNLskvUiguKQIySotSeRhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJvLOfoaGBqYmJmbmhozExagAubyki</recordid><startdate>20191206</startdate><enddate>20191206</enddate><creator>GUO GUIQI</creator><creator>YU ZIQIANG</creator><scope>EVB</scope></search><sort><creationdate>20191206</creationdate><title>Forming method of semiconductor structure</title><author>GUO GUIQI ; YU ZIQIANG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN110544671A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>GUO GUIQI</creatorcontrib><creatorcontrib>YU ZIQIANG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GUO GUIQI</au><au>YU ZIQIANG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Forming method of semiconductor structure</title><date>2019-12-06</date><risdate>2019</risdate><abstract>The invention discloses a forming method of a semiconductor structure. The method comprises the following steps: forming a laminated structure on a semiconductor substrate; forming a patterned mask layer on the laminated structure; forming a contact hole and a groove in the laminated structure; and forming a second conductive channel and a third conductive channel in the contact hole and the groove, wherein the patterned mask layer comprises a contact hole pattern and a groove pattern corresponding to the first conductive channel, and the heights of the contact hole pattern and the groove pattern are set by the material and height of the first dielectric layer and the second dielectric layer. According to the method provided by the invention, a patterned mask layer is formed by adopting agray-scale photoetching method, a nanoimprint method, a gray-scale mask plate photoetching method or an ion beam gas-assisted deposition method, a semiconductor structure is etched by using dry etching, and patterns of the ma</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_CN110544671A |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Forming method of semiconductor structure |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T21%3A31%3A38IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GUO%20GUIQI&rft.date=2019-12-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN110544671A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |