Design of a taking point for reducing crack rate of PCB
The invention relates to the technical field of PCB production and processing, and discloses a design of a taking point for reducing the PCB crack rate and a graph of the taking point. The design comprises three taking points located on two short edges of a rectangular PCB, wherein one short edge at...
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| creator | CHENG HUI PIAO XUANCHANG WANG ZHENPENG WANG PANFENG ZHOU JUNJIE |
| description | The invention relates to the technical field of PCB production and processing, and discloses a design of a taking point for reducing the PCB crack rate and a graph of the taking point. The design comprises three taking points located on two short edges of a rectangular PCB, wherein one short edge at one side is provided with one taking point, the short edge at the other side is provided with two taking points, the two taking points on the same short edge are symmetrically arranged relative to the central axis of the PCB, and the connecting line of the two taking points passes through the center of the PCB. The three taking points are arranged on the short edge, so a worker with a large arm spread can take the PCB from the two taking points on the diagonal line, and a worker with a small arm spread can take the PCB from the two taking points parallel to the long edge of the PCB through the connecting line, and therefore, the design is suitable for all workers to take the short edge of the PCB.
本发明涉及PCB生产加工技术领域 |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN110351952A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN110351952A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN110351952A3</originalsourceid><addsrcrecordid>eNrjZDB3SS3OTM9TyE9TSFQoSczOzEtXKMjPzCtRSMsvUihKTSlNBgklFyUmZysUJZakglQGODvxMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JJ4Zz9DQwNjU0NLUyNHY2LUAAA8SCx-</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Design of a taking point for reducing crack rate of PCB</title><source>esp@cenet</source><creator>CHENG HUI ; PIAO XUANCHANG ; WANG ZHENPENG ; WANG PANFENG ; ZHOU JUNJIE</creator><creatorcontrib>CHENG HUI ; PIAO XUANCHANG ; WANG ZHENPENG ; WANG PANFENG ; ZHOU JUNJIE</creatorcontrib><description>The invention relates to the technical field of PCB production and processing, and discloses a design of a taking point for reducing the PCB crack rate and a graph of the taking point. The design comprises three taking points located on two short edges of a rectangular PCB, wherein one short edge at one side is provided with one taking point, the short edge at the other side is provided with two taking points, the two taking points on the same short edge are symmetrically arranged relative to the central axis of the PCB, and the connecting line of the two taking points passes through the center of the PCB. The three taking points are arranged on the short edge, so a worker with a large arm spread can take the PCB from the two taking points on the diagonal line, and a worker with a small arm spread can take the PCB from the two taking points parallel to the long edge of the PCB through the connecting line, and therefore, the design is suitable for all workers to take the short edge of the PCB.
本发明涉及PCB生产加工技术领域</description><language>chi ; eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191018&DB=EPODOC&CC=CN&NR=110351952A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20191018&DB=EPODOC&CC=CN&NR=110351952A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHENG HUI</creatorcontrib><creatorcontrib>PIAO XUANCHANG</creatorcontrib><creatorcontrib>WANG ZHENPENG</creatorcontrib><creatorcontrib>WANG PANFENG</creatorcontrib><creatorcontrib>ZHOU JUNJIE</creatorcontrib><title>Design of a taking point for reducing crack rate of PCB</title><description>The invention relates to the technical field of PCB production and processing, and discloses a design of a taking point for reducing the PCB crack rate and a graph of the taking point. The design comprises three taking points located on two short edges of a rectangular PCB, wherein one short edge at one side is provided with one taking point, the short edge at the other side is provided with two taking points, the two taking points on the same short edge are symmetrically arranged relative to the central axis of the PCB, and the connecting line of the two taking points passes through the center of the PCB. The three taking points are arranged on the short edge, so a worker with a large arm spread can take the PCB from the two taking points on the diagonal line, and a worker with a small arm spread can take the PCB from the two taking points parallel to the long edge of the PCB through the connecting line, and therefore, the design is suitable for all workers to take the short edge of the PCB.
本发明涉及PCB生产加工技术领域</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDB3SS3OTM9TyE9TSFQoSczOzEtXKMjPzCtRSMsvUihKTSlNBgklFyUmZysUJZakglQGODvxMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JJ4Zz9DQwNjU0NLUyNHY2LUAAA8SCx-</recordid><startdate>20191018</startdate><enddate>20191018</enddate><creator>CHENG HUI</creator><creator>PIAO XUANCHANG</creator><creator>WANG ZHENPENG</creator><creator>WANG PANFENG</creator><creator>ZHOU JUNJIE</creator><scope>EVB</scope></search><sort><creationdate>20191018</creationdate><title>Design of a taking point for reducing crack rate of PCB</title><author>CHENG HUI ; PIAO XUANCHANG ; WANG ZHENPENG ; WANG PANFENG ; ZHOU JUNJIE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN110351952A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2019</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>CHENG HUI</creatorcontrib><creatorcontrib>PIAO XUANCHANG</creatorcontrib><creatorcontrib>WANG ZHENPENG</creatorcontrib><creatorcontrib>WANG PANFENG</creatorcontrib><creatorcontrib>ZHOU JUNJIE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHENG HUI</au><au>PIAO XUANCHANG</au><au>WANG ZHENPENG</au><au>WANG PANFENG</au><au>ZHOU JUNJIE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Design of a taking point for reducing crack rate of PCB</title><date>2019-10-18</date><risdate>2019</risdate><abstract>The invention relates to the technical field of PCB production and processing, and discloses a design of a taking point for reducing the PCB crack rate and a graph of the taking point. The design comprises three taking points located on two short edges of a rectangular PCB, wherein one short edge at one side is provided with one taking point, the short edge at the other side is provided with two taking points, the two taking points on the same short edge are symmetrically arranged relative to the central axis of the PCB, and the connecting line of the two taking points passes through the center of the PCB. The three taking points are arranged on the short edge, so a worker with a large arm spread can take the PCB from the two taking points on the diagonal line, and a worker with a small arm spread can take the PCB from the two taking points parallel to the long edge of the PCB through the connecting line, and therefore, the design is suitable for all workers to take the short edge of the PCB.
本发明涉及PCB生产加工技术领域</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
| title | Design of a taking point for reducing crack rate of PCB |
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