High-speed dynamic comparator, successive approximation type analog-to-digital converter and electronic equipment
The invention discloses a high-speed dynamic comparator. The high-speed dynamic comparator comprises an input NMOS tube M1/M2, a latch structure composed of an NMOS tube M4/M5 and a PMOS tube M7/M8, a reset control switch composed of an NMOS tube M6 and a PMOS tube M9, and a pull-down tube composed...
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| creator | XU DAIGUO WANG XU CHEN GUANGBING DENG MINMING SHI HANFU LIU LU XU SHILIU LIU TAO |
| description | The invention discloses a high-speed dynamic comparator. The high-speed dynamic comparator comprises an input NMOS tube M1/M2, a latch structure composed of an NMOS tube M4/M5 and a PMOS tube M7/M8, a reset control switch composed of an NMOS tube M6 and a PMOS tube M9, and a pull-down tube composed of an NMOS tube M3/M10/M11. The high-speed dynamic comparator also comprises an inverter I0/I1/I2, a delay unit d1/d2, an AND gate AND1/AND2, and an XNOR gate XNOR. According to the invention, by controlling the closing sequence of M10 and M11, tip and tin are conducted at the same time to form a high-speed mode and a low-speed mode, and then, the conduction current is increased, and the high-speed dynamic comparator enters a latch state firstly, so as to suppress the noise effectively, and in addition, wide application value can be achieved when the high-speed dynamic comparator is applied in an existing successive approximation type analog-to-digital converter and electronic equipment.
本发明公开了一种高速动态比较器，包括输入NMOS管M1 |
| format | Patent |
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本发明公开了一种高速动态比较器，包括输入NMOS管M1</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjDEOwjAQBNNQIOAPpscSISjUKAKloqKPTs4RLNm-i32JyO9xwQOoVtrZ2XUxtnZ468SIveqXAN4aZcgzRBCKB5UmYzAlO6MC5kgf60EsBSUL5yqAo0EL6d4OVsBlN8wYBWNmvUKHRiKFfIrjZNljkG2xeoFLuPvlptjfb8-m1cjUYWIwGFC65lGWx9P5UtfVtfpn8wUm3kS9</recordid><startdate>20190917</startdate><enddate>20190917</enddate><creator>XU DAIGUO</creator><creator>WANG XU</creator><creator>CHEN GUANGBING</creator><creator>DENG MINMING</creator><creator>SHI HANFU</creator><creator>LIU LU</creator><creator>XU SHILIU</creator><creator>LIU TAO</creator><scope>EVB</scope></search><sort><creationdate>20190917</creationdate><title>High-speed dynamic comparator, successive approximation type analog-to-digital converter and electronic equipment</title><author>XU DAIGUO ; WANG XU ; CHEN GUANGBING ; DENG MINMING ; SHI HANFU ; LIU LU ; XU SHILIU ; LIU TAO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN110247663A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>XU DAIGUO</creatorcontrib><creatorcontrib>WANG XU</creatorcontrib><creatorcontrib>CHEN GUANGBING</creatorcontrib><creatorcontrib>DENG MINMING</creatorcontrib><creatorcontrib>SHI HANFU</creatorcontrib><creatorcontrib>LIU LU</creatorcontrib><creatorcontrib>XU SHILIU</creatorcontrib><creatorcontrib>LIU TAO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>XU DAIGUO</au><au>WANG XU</au><au>CHEN GUANGBING</au><au>DENG MINMING</au><au>SHI HANFU</au><au>LIU LU</au><au>XU SHILIU</au><au>LIU TAO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>High-speed dynamic comparator, successive approximation type analog-to-digital converter and electronic equipment</title><date>2019-09-17</date><risdate>2019</risdate><abstract>The invention discloses a high-speed dynamic comparator. The high-speed dynamic comparator comprises an input NMOS tube M1/M2, a latch structure composed of an NMOS tube M4/M5 and a PMOS tube M7/M8, a reset control switch composed of an NMOS tube M6 and a PMOS tube M9, and a pull-down tube composed of an NMOS tube M3/M10/M11. The high-speed dynamic comparator also comprises an inverter I0/I1/I2, a delay unit d1/d2, an AND gate AND1/AND2, and an XNOR gate XNOR. According to the invention, by controlling the closing sequence of M10 and M11, tip and tin are conducted at the same time to form a high-speed mode and a low-speed mode, and then, the conduction current is increased, and the high-speed dynamic comparator enters a latch state firstly, so as to suppress the noise effectively, and in addition, wide application value can be achieved when the high-speed dynamic comparator is applied in an existing successive approximation type analog-to-digital converter and electronic equipment.
本发明公开了一种高速动态比较器，包括输入NMOS管M1</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY |
| title | High-speed dynamic comparator, successive approximation type analog-to-digital converter and electronic equipment |
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