USING COMPRESSION TO INCREASE CAPACITY OF A MEMORY-SIDE CACHE WITH LARGE BLOCK SIZE
Systems, apparatuses and methods may provide for identifying a first block and a second block, wherein the first block includes a first plurality of cache lines, the second block includes a second plurality of cache lines, and the second block resides in a memory-side cache. Additionally, each cache...
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creator | FANNING BLAISE ALAMELDEEN ALAA R HINTON GLENN J GREENSKY JAMES J |
description | Systems, apparatuses and methods may provide for identifying a first block and a second block, wherein the first block includes a first plurality of cache lines, the second block includes a second plurality of cache lines, and the second block resides in a memory-side cache. Additionally, each cache line in the first plurality of cache lines may be compressed with a corresponding cache line in thesecond plurality of cache lines to obtain a compressed block that includes a third plurality of cache lines. In one example, the second block is replaced in the memory-side cache with the compressedblock if the compressed block satisfies a size condition.
系统、设备以及方法可以提供标识第块和第二块,其中第块包括第多个高速缓存行,第二块包括第二多个高速缓存行,并且第二块驻留于存储器侧高速缓存中。另外,可以将第多个高速缓存行中的每个高速缓存行与第二多个高速缓存行中的对应的高速缓存行起压缩,以获得包括第三多个高速缓存行的压缩的块。在个示例中,如果压缩的块满足大小条件,则在存储器侧高速缓存中以压缩的块替换第二块。 |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN109643278A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN109643278A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN109643278A3</originalsourceid><addsrcrecordid>eNqNyk0KwjAQQOFsXIh6h_EABbXizzKO02awSUomInVTisSVaKHeHxE8gKu3-N5YyVnYlYDe1oFE2DuIHthhIC0EqGuNHBvwBWiwZH1oMuHjV9AQXDgaqHQoCQ6VxxMIX2mqRvfuMaTZrxM1LyiiyVL_atPQd7f0TO8W3XKx36zz1Xan83-eD9dFL38</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>USING COMPRESSION TO INCREASE CAPACITY OF A MEMORY-SIDE CACHE WITH LARGE BLOCK SIZE</title><source>esp@cenet</source><creator>FANNING BLAISE ; ALAMELDEEN ALAA R ; HINTON GLENN J ; GREENSKY JAMES J</creator><creatorcontrib>FANNING BLAISE ; ALAMELDEEN ALAA R ; HINTON GLENN J ; GREENSKY JAMES J</creatorcontrib><description>Systems, apparatuses and methods may provide for identifying a first block and a second block, wherein the first block includes a first plurality of cache lines, the second block includes a second plurality of cache lines, and the second block resides in a memory-side cache. Additionally, each cache line in the first plurality of cache lines may be compressed with a corresponding cache line in thesecond plurality of cache lines to obtain a compressed block that includes a third plurality of cache lines. In one example, the second block is replaced in the memory-side cache with the compressedblock if the compressed block satisfies a size condition.
系统、设备以及方法可以提供标识第块和第二块,其中第块包括第多个高速缓存行,第二块包括第二多个高速缓存行,并且第二块驻留于存储器侧高速缓存中。另外,可以将第多个高速缓存行中的每个高速缓存行与第二多个高速缓存行中的对应的高速缓存行起压缩,以获得包括第三多个高速缓存行的压缩的块。在个示例中,如果压缩的块满足大小条件,则在存储器侧高速缓存中以压缩的块替换第二块。</description><language>chi ; eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190416&DB=EPODOC&CC=CN&NR=109643278A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190416&DB=EPODOC&CC=CN&NR=109643278A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FANNING BLAISE</creatorcontrib><creatorcontrib>ALAMELDEEN ALAA R</creatorcontrib><creatorcontrib>HINTON GLENN J</creatorcontrib><creatorcontrib>GREENSKY JAMES J</creatorcontrib><title>USING COMPRESSION TO INCREASE CAPACITY OF A MEMORY-SIDE CACHE WITH LARGE BLOCK SIZE</title><description>Systems, apparatuses and methods may provide for identifying a first block and a second block, wherein the first block includes a first plurality of cache lines, the second block includes a second plurality of cache lines, and the second block resides in a memory-side cache. Additionally, each cache line in the first plurality of cache lines may be compressed with a corresponding cache line in thesecond plurality of cache lines to obtain a compressed block that includes a third plurality of cache lines. In one example, the second block is replaced in the memory-side cache with the compressedblock if the compressed block satisfies a size condition.
系统、设备以及方法可以提供标识第块和第二块,其中第块包括第多个高速缓存行,第二块包括第二多个高速缓存行,并且第二块驻留于存储器侧高速缓存中。另外,可以将第多个高速缓存行中的每个高速缓存行与第二多个高速缓存行中的对应的高速缓存行起压缩,以获得包括第三多个高速缓存行的压缩的块。在个示例中,如果压缩的块满足大小条件,则在存储器侧高速缓存中以压缩的块替换第二块。</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyk0KwjAQQOFsXIh6h_EABbXizzKO02awSUomInVTisSVaKHeHxE8gKu3-N5YyVnYlYDe1oFE2DuIHthhIC0EqGuNHBvwBWiwZH1oMuHjV9AQXDgaqHQoCQ6VxxMIX2mqRvfuMaTZrxM1LyiiyVL_atPQd7f0TO8W3XKx36zz1Xan83-eD9dFL38</recordid><startdate>20190416</startdate><enddate>20190416</enddate><creator>FANNING BLAISE</creator><creator>ALAMELDEEN ALAA R</creator><creator>HINTON GLENN J</creator><creator>GREENSKY JAMES J</creator><scope>EVB</scope></search><sort><creationdate>20190416</creationdate><title>USING COMPRESSION TO INCREASE CAPACITY OF A MEMORY-SIDE CACHE WITH LARGE BLOCK SIZE</title><author>FANNING BLAISE ; ALAMELDEEN ALAA R ; HINTON GLENN J ; GREENSKY JAMES J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN109643278A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2019</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>FANNING BLAISE</creatorcontrib><creatorcontrib>ALAMELDEEN ALAA R</creatorcontrib><creatorcontrib>HINTON GLENN J</creatorcontrib><creatorcontrib>GREENSKY JAMES J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FANNING BLAISE</au><au>ALAMELDEEN ALAA R</au><au>HINTON GLENN J</au><au>GREENSKY JAMES J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>USING COMPRESSION TO INCREASE CAPACITY OF A MEMORY-SIDE CACHE WITH LARGE BLOCK SIZE</title><date>2019-04-16</date><risdate>2019</risdate><abstract>Systems, apparatuses and methods may provide for identifying a first block and a second block, wherein the first block includes a first plurality of cache lines, the second block includes a second plurality of cache lines, and the second block resides in a memory-side cache. Additionally, each cache line in the first plurality of cache lines may be compressed with a corresponding cache line in thesecond plurality of cache lines to obtain a compressed block that includes a third plurality of cache lines. In one example, the second block is replaced in the memory-side cache with the compressedblock if the compressed block satisfies a size condition.
系统、设备以及方法可以提供标识第块和第二块,其中第块包括第多个高速缓存行,第二块包括第二多个高速缓存行,并且第二块驻留于存储器侧高速缓存中。另外,可以将第多个高速缓存行中的每个高速缓存行与第二多个高速缓存行中的对应的高速缓存行起压缩,以获得包括第三多个高速缓存行的压缩的块。在个示例中,如果压缩的块满足大小条件,则在存储器侧高速缓存中以压缩的块替换第二块。</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | USING COMPRESSION TO INCREASE CAPACITY OF A MEMORY-SIDE CACHE WITH LARGE BLOCK SIZE |
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