Method for fabricating interconnection structure

Method for fabricating interconnection structure

The present invention provides a method for fabricating an interconnection structure. The method comprises providing a semiconductor substrate; forming a trench in the semiconductor substrate; formingan interconnection layer to fill the trench and cover the semiconductor substrate; after self-anneal...

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1. Verfasser: LIN AIMEI
Format: Patent
Sprache:chi ; eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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description The present invention provides a method for fabricating an interconnection structure. The method comprises providing a semiconductor substrate; forming a trench in the semiconductor substrate; formingan interconnection layer to fill the trench and cover the semiconductor substrate; after self-annealing is performed for a period of time, removing a portion of the interconnection layer covering thesemiconductor substrate to form the interconnection structure; and forming a covering layer to cover the semiconductor substrate and the interconnection structure, wherein the period of time is in arange of 1h to 10h. Since the grain size on the semiconductor substrate has a self-annealing phenomenon at room temperature, the self-annealing is performed after the interconnection layer is formed,and then the interconnection layer is removed and the covering layer is formed after 1h to 10h. Though the self-annealing takes a longer time than the rapid annealing, the interconnection layer can achieve stress matching in the
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Method for fabricating interconnection structure
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