Gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method
The present invention discloses a gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method with a simple process flow, saved cost and high efficiency. The methodcomprises the steps of: dividing the surface of a barrier layer into a vertical leakage current test...
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | GAO JUN SONG SHUKUAN LIANG HUINAN WANG RONGHUA REN YONGSHUO CHENG WANXI |
description | The present invention discloses a gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method with a simple process flow, saved cost and high efficiency. The methodcomprises the steps of: dividing the surface of a barrier layer into a vertical leakage current test area and a Hall effect test area; performing the first photolithography to all expose the verticalleakage current test area and expose an isolation area between square test units of the Hall effect test area; performing first etching, wherein the etching depth reaches the channel layer; performingremoving of photoresist; employing a first shadow mask plate to perform electrode evaporation or sputtering, wherein first electrodeposition through holes are uniformly distributed on the first shadow mask plate; performing vertical leakage current test; performing ohmic contact annealing; and performing Hall effect test.
本发明公开种工艺流程简单、节约成本及效率高的氮化镓外延片垂直漏电流与霍尔效应复合测试方法,依次按照如下步骤进行:将势垒层表面分出垂直漏电流测试区域及霍尔效应测试区域;进行第次光刻,使垂直漏电流测试区域全部 |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN109585326A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN109585326A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN109585326A3</originalsourceid><addsrcrecordid>eNqNi7EKwkAQBdNYiPoP6wcIalC0lKCmsrI2LJd3uni5O-426uebwg-wGgZmxsXtzM5J35EXTdKCEEX5I-zozRaJXkgqZlAHfvIdZPqU4JXYt1QPM8FaGCUTuhiyKEiRlTroI7TTYmTZZcx-nBTz0_Fa1QvE0CBHNvDQprqslvvNblOut4fyn-YLUcs8vw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method</title><source>esp@cenet</source><creator>GAO JUN ; SONG SHUKUAN ; LIANG HUINAN ; WANG RONGHUA ; REN YONGSHUO ; CHENG WANXI</creator><creatorcontrib>GAO JUN ; SONG SHUKUAN ; LIANG HUINAN ; WANG RONGHUA ; REN YONGSHUO ; CHENG WANXI</creatorcontrib><description>The present invention discloses a gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method with a simple process flow, saved cost and high efficiency. The methodcomprises the steps of: dividing the surface of a barrier layer into a vertical leakage current test area and a Hall effect test area; performing the first photolithography to all expose the verticalleakage current test area and expose an isolation area between square test units of the Hall effect test area; performing first etching, wherein the etching depth reaches the channel layer; performingremoving of photoresist; employing a first shadow mask plate to perform electrode evaporation or sputtering, wherein first electrodeposition through holes are uniformly distributed on the first shadow mask plate; performing vertical leakage current test; performing ohmic contact annealing; and performing Hall effect test.
本发明公开种工艺流程简单、节约成本及效率高的氮化镓外延片垂直漏电流与霍尔效应复合测试方法,依次按照如下步骤进行:将势垒层表面分出垂直漏电流测试区域及霍尔效应测试区域;进行第次光刻,使垂直漏电流测试区域全部</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190405&DB=EPODOC&CC=CN&NR=109585326A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190405&DB=EPODOC&CC=CN&NR=109585326A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GAO JUN</creatorcontrib><creatorcontrib>SONG SHUKUAN</creatorcontrib><creatorcontrib>LIANG HUINAN</creatorcontrib><creatorcontrib>WANG RONGHUA</creatorcontrib><creatorcontrib>REN YONGSHUO</creatorcontrib><creatorcontrib>CHENG WANXI</creatorcontrib><title>Gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method</title><description>The present invention discloses a gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method with a simple process flow, saved cost and high efficiency. The methodcomprises the steps of: dividing the surface of a barrier layer into a vertical leakage current test area and a Hall effect test area; performing the first photolithography to all expose the verticalleakage current test area and expose an isolation area between square test units of the Hall effect test area; performing first etching, wherein the etching depth reaches the channel layer; performingremoving of photoresist; employing a first shadow mask plate to perform electrode evaporation or sputtering, wherein first electrodeposition through holes are uniformly distributed on the first shadow mask plate; performing vertical leakage current test; performing ohmic contact annealing; and performing Hall effect test.
本发明公开种工艺流程简单、节约成本及效率高的氮化镓外延片垂直漏电流与霍尔效应复合测试方法,依次按照如下步骤进行:将势垒层表面分出垂直漏电流测试区域及霍尔效应测试区域;进行第次光刻,使垂直漏电流测试区域全部</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi7EKwkAQBdNYiPoP6wcIalC0lKCmsrI2LJd3uni5O-426uebwg-wGgZmxsXtzM5J35EXTdKCEEX5I-zozRaJXkgqZlAHfvIdZPqU4JXYt1QPM8FaGCUTuhiyKEiRlTroI7TTYmTZZcx-nBTz0_Fa1QvE0CBHNvDQprqslvvNblOut4fyn-YLUcs8vw</recordid><startdate>20190405</startdate><enddate>20190405</enddate><creator>GAO JUN</creator><creator>SONG SHUKUAN</creator><creator>LIANG HUINAN</creator><creator>WANG RONGHUA</creator><creator>REN YONGSHUO</creator><creator>CHENG WANXI</creator><scope>EVB</scope></search><sort><creationdate>20190405</creationdate><title>Gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method</title><author>GAO JUN ; SONG SHUKUAN ; LIANG HUINAN ; WANG RONGHUA ; REN YONGSHUO ; CHENG WANXI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN109585326A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2019</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>GAO JUN</creatorcontrib><creatorcontrib>SONG SHUKUAN</creatorcontrib><creatorcontrib>LIANG HUINAN</creatorcontrib><creatorcontrib>WANG RONGHUA</creatorcontrib><creatorcontrib>REN YONGSHUO</creatorcontrib><creatorcontrib>CHENG WANXI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GAO JUN</au><au>SONG SHUKUAN</au><au>LIANG HUINAN</au><au>WANG RONGHUA</au><au>REN YONGSHUO</au><au>CHENG WANXI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method</title><date>2019-04-05</date><risdate>2019</risdate><abstract>The present invention discloses a gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method with a simple process flow, saved cost and high efficiency. The methodcomprises the steps of: dividing the surface of a barrier layer into a vertical leakage current test area and a Hall effect test area; performing the first photolithography to all expose the verticalleakage current test area and expose an isolation area between square test units of the Hall effect test area; performing first etching, wherein the etching depth reaches the channel layer; performingremoving of photoresist; employing a first shadow mask plate to perform electrode evaporation or sputtering, wherein first electrodeposition through holes are uniformly distributed on the first shadow mask plate; performing vertical leakage current test; performing ohmic contact annealing; and performing Hall effect test.
本发明公开种工艺流程简单、节约成本及效率高的氮化镓外延片垂直漏电流与霍尔效应复合测试方法,依次按照如下步骤进行:将势垒层表面分出垂直漏电流测试区域及霍尔效应测试区域;进行第次光刻,使垂直漏电流测试区域全部</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_CN109585326A |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Gallium nitride epitaxial wafer vertical leakage current and Hall effect composite test method |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T06%3A33%3A14IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GAO%20JUN&rft.date=2019-04-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN109585326A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |