DC-offset canceler circuit and method for using the circuit
A dc-offset canceler circuit is provided, which cancels a dc offset more effectively. This circuit includes a first differential pair of emitter-coupled first and second bipolar transistors driven by a first constant current source/sink, and a second differential pair of emitter-coupled third and fo...
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creator | HIROSHI KUDOU |
description | A dc-offset canceler circuit is provided, which cancels a dc offset more effectively. This circuit includes a first differential pair of emitter-coupled first and second bipolar transistors driven by a first constant current source/sink, and a second differential pair of emitter-coupled third and fourth bipolar transistors driven by a second constant current source/sink. The first and second differential pairs are coupled by a coupling capacitor. An emitter of a fifth bipolar transistor is connected to the emitters of the first and second transistors. An emitter of a sixth bipolar transistor is connected to the emitters of the third and fourth transistors. Bases of the first and fifth transistors are connected to a first input terminal. A base of the second transistor is connected to the first input terminal through a first resistor. Bases of the fourth and sixth transistors are connected to a second input terminal. A base of the third transistor is connected to the second input terminal through a second resistor. Collectors of the first, third, and sixth transistors are connected to a first output terminal, and those of the second, fourth, and fifth transistors are connected to a second output terminal. |
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This circuit includes a first differential pair of emitter-coupled first and second bipolar transistors driven by a first constant current source/sink, and a second differential pair of emitter-coupled third and fourth bipolar transistors driven by a second constant current source/sink. The first and second differential pairs are coupled by a coupling capacitor. An emitter of a fifth bipolar transistor is connected to the emitters of the first and second transistors. An emitter of a sixth bipolar transistor is connected to the emitters of the third and fourth transistors. Bases of the first and fifth transistors are connected to a first input terminal. A base of the second transistor is connected to the first input terminal through a first resistor. Bases of the fourth and sixth transistors are connected to a second input terminal. A base of the third transistor is connected to the second input terminal through a second resistor. Collectors of the first, third, and sixth transistors are connected to a first output terminal, and those of the second, fourth, and fifth transistors are connected to a second output terminal.</description><edition>7</edition><language>eng</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020220&DB=EPODOC&CC=CN&NR=1079610C$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020220&DB=EPODOC&CC=CN&NR=1079610C$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HIROSHI KUDOU</creatorcontrib><title>DC-offset canceler circuit and method for using the circuit</title><description>A dc-offset canceler circuit is provided, which cancels a dc offset more effectively. This circuit includes a first differential pair of emitter-coupled first and second bipolar transistors driven by a first constant current source/sink, and a second differential pair of emitter-coupled third and fourth bipolar transistors driven by a second constant current source/sink. The first and second differential pairs are coupled by a coupling capacitor. An emitter of a fifth bipolar transistor is connected to the emitters of the first and second transistors. An emitter of a sixth bipolar transistor is connected to the emitters of the third and fourth transistors. Bases of the first and fifth transistors are connected to a first input terminal. A base of the second transistor is connected to the first input terminal through a first resistor. Bases of the fourth and sixth transistors are connected to a second input terminal. A base of the third transistor is connected to the second input terminal through a second resistor. Collectors of the first, third, and sixth transistors are connected to a first output terminal, and those of the second, fourth, and fifth transistors are connected to a second output terminal.</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLB2cdbNT0srTi1RSE7MS07NSS1SSM4sSi7NLFFIzEtRyE0tychPUUjLL1IoLc7MS1coyUiFKeBhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfHOfoYG5pZmhgbOzsZEKAEAD1kumg</recordid><startdate>20020220</startdate><enddate>20020220</enddate><creator>HIROSHI KUDOU</creator><scope>EVB</scope></search><sort><creationdate>20020220</creationdate><title>DC-offset canceler circuit and method for using the circuit</title><author>HIROSHI KUDOU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN1079610CC3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>HIROSHI KUDOU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HIROSHI KUDOU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DC-offset canceler circuit and method for using the circuit</title><date>2002-02-20</date><risdate>2002</risdate><abstract>A dc-offset canceler circuit is provided, which cancels a dc offset more effectively. This circuit includes a first differential pair of emitter-coupled first and second bipolar transistors driven by a first constant current source/sink, and a second differential pair of emitter-coupled third and fourth bipolar transistors driven by a second constant current source/sink. The first and second differential pairs are coupled by a coupling capacitor. An emitter of a fifth bipolar transistor is connected to the emitters of the first and second transistors. An emitter of a sixth bipolar transistor is connected to the emitters of the third and fourth transistors. Bases of the first and fifth transistors are connected to a first input terminal. A base of the second transistor is connected to the first input terminal through a first resistor. Bases of the fourth and sixth transistors are connected to a second input terminal. A base of the third transistor is connected to the second input terminal through a second resistor. Collectors of the first, third, and sixth transistors are connected to a first output terminal, and those of the second, fourth, and fifth transistors are connected to a second output terminal.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | AMPLIFIERS BASIC ELECTRONIC CIRCUITRY ELECTRICITY |
title | DC-offset canceler circuit and method for using the circuit |
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