Semiconductor Structure And Fabricating Method Thereof

A method of fabricating a semiconductor structure includes: forming a conductive layer on a first insulating layer; etching a portion of the conductive layer to expose a portion of the first insulating layer; deforming a surface of the portion of the first insulating layer to form a rough surface of...

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Hauptverfasser: LIU, KUOIO, HUANG, HSINIEH, CHEN, CHEN-SHIEN, WONG, JHENG-JIE, HUANG, WEI-LI, LIAO, DE-DUI MARVIN, HUANG, TSUNG-LUNG, SU, HSIANG-SHENG, KU, CHIN-YU
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creator LIU, KUOIO
HUANG, HSINIEH
CHEN, CHEN-SHIEN
WONG, JHENG-JIE
HUANG, WEI-LI
LIAO, DE-DUI MARVIN
HUANG, TSUNG-LUNG
SU, HSIANG-SHENG
KU, CHIN-YU
description A method of fabricating a semiconductor structure includes: forming a conductive layer on a first insulating layer; etching a portion of the conductive layer to expose a portion of the first insulating layer; deforming a surface of the portion of the first insulating layer to form a rough surface of the first insulating layer; and removing a residue of the conductive layer on the rough surface of the first insulating layer. 本发明实施例涉及半导体结构及其制造方法。种制造半导体结构的方法,所述方法包含形成传导层于第绝缘层上;蚀刻所述传导层的部分,以暴露所述第绝缘层的部分;变形所述第绝缘层的所述部分的表面,以形成所述第绝缘层的粗糙表面;以及从所述第绝缘层的所述粗糙表面移除所述传导层的残留物。
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN107230645A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN107230645A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN107230645A3</originalsourceid><addsrcrecordid>eNrjZDALTs3NTM7PSylNLskvUgguKQIySotSFRzzUhTcEpOKMpMTSzLz0hV8U0sy8lMUQjJSi1Lz03gYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSbyzn6GBuZGxgZmJqaMxMWoApAAtgA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor Structure And Fabricating Method Thereof</title><source>esp@cenet</source><creator>LIU, KUOIO ; HUANG, HSINIEH ; CHEN, CHEN-SHIEN ; WONG, JHENG-JIE ; HUANG, WEI-LI ; LIAO, DE-DUI MARVIN ; HUANG, TSUNG-LUNG ; SU, HSIANG-SHENG ; KU, CHIN-YU</creator><creatorcontrib>LIU, KUOIO ; HUANG, HSINIEH ; CHEN, CHEN-SHIEN ; WONG, JHENG-JIE ; HUANG, WEI-LI ; LIAO, DE-DUI MARVIN ; HUANG, TSUNG-LUNG ; SU, HSIANG-SHENG ; KU, CHIN-YU</creatorcontrib><description>A method of fabricating a semiconductor structure includes: forming a conductive layer on a first insulating layer; etching a portion of the conductive layer to expose a portion of the first insulating layer; deforming a surface of the portion of the first insulating layer to form a rough surface of the first insulating layer; and removing a residue of the conductive layer on the rough surface of the first insulating layer. 本发明实施例涉及半导体结构及其制造方法。种制造半导体结构的方法,所述方法包含形成传导层于第绝缘层上;蚀刻所述传导层的部分,以暴露所述第绝缘层的部分;变形所述第绝缘层的所述部分的表面,以形成所述第绝缘层的粗糙表面;以及从所述第绝缘层的所述粗糙表面移除所述传导层的残留物。</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20171003&amp;DB=EPODOC&amp;CC=CN&amp;NR=107230645A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20171003&amp;DB=EPODOC&amp;CC=CN&amp;NR=107230645A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LIU, KUOIO</creatorcontrib><creatorcontrib>HUANG, HSINIEH</creatorcontrib><creatorcontrib>CHEN, CHEN-SHIEN</creatorcontrib><creatorcontrib>WONG, JHENG-JIE</creatorcontrib><creatorcontrib>HUANG, WEI-LI</creatorcontrib><creatorcontrib>LIAO, DE-DUI MARVIN</creatorcontrib><creatorcontrib>HUANG, TSUNG-LUNG</creatorcontrib><creatorcontrib>SU, HSIANG-SHENG</creatorcontrib><creatorcontrib>KU, CHIN-YU</creatorcontrib><title>Semiconductor Structure And Fabricating Method Thereof</title><description>A method of fabricating a semiconductor structure includes: forming a conductive layer on a first insulating layer; etching a portion of the conductive layer to expose a portion of the first insulating layer; deforming a surface of the portion of the first insulating layer to form a rough surface of the first insulating layer; and removing a residue of the conductive layer on the rough surface of the first insulating layer. 本发明实施例涉及半导体结构及其制造方法。种制造半导体结构的方法,所述方法包含形成传导层于第绝缘层上;蚀刻所述传导层的部分,以暴露所述第绝缘层的部分;变形所述第绝缘层的所述部分的表面,以形成所述第绝缘层的粗糙表面;以及从所述第绝缘层的所述粗糙表面移除所述传导层的残留物。</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDALTs3NTM7PSylNLskvUgguKQIySotSFRzzUhTcEpOKMpMTSzLz0hV8U0sy8lMUQjJSi1Lz03gYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSbyzn6GBuZGxgZmJqaMxMWoApAAtgA</recordid><startdate>20171003</startdate><enddate>20171003</enddate><creator>LIU, KUOIO</creator><creator>HUANG, HSINIEH</creator><creator>CHEN, CHEN-SHIEN</creator><creator>WONG, JHENG-JIE</creator><creator>HUANG, WEI-LI</creator><creator>LIAO, DE-DUI MARVIN</creator><creator>HUANG, TSUNG-LUNG</creator><creator>SU, HSIANG-SHENG</creator><creator>KU, CHIN-YU</creator><scope>EVB</scope></search><sort><creationdate>20171003</creationdate><title>Semiconductor Structure And Fabricating Method Thereof</title><author>LIU, KUOIO ; HUANG, HSINIEH ; CHEN, CHEN-SHIEN ; WONG, JHENG-JIE ; HUANG, WEI-LI ; LIAO, DE-DUI MARVIN ; HUANG, TSUNG-LUNG ; SU, HSIANG-SHENG ; KU, CHIN-YU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN107230645A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LIU, KUOIO</creatorcontrib><creatorcontrib>HUANG, HSINIEH</creatorcontrib><creatorcontrib>CHEN, CHEN-SHIEN</creatorcontrib><creatorcontrib>WONG, JHENG-JIE</creatorcontrib><creatorcontrib>HUANG, WEI-LI</creatorcontrib><creatorcontrib>LIAO, DE-DUI MARVIN</creatorcontrib><creatorcontrib>HUANG, TSUNG-LUNG</creatorcontrib><creatorcontrib>SU, HSIANG-SHENG</creatorcontrib><creatorcontrib>KU, CHIN-YU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIU, KUOIO</au><au>HUANG, HSINIEH</au><au>CHEN, CHEN-SHIEN</au><au>WONG, JHENG-JIE</au><au>HUANG, WEI-LI</au><au>LIAO, DE-DUI MARVIN</au><au>HUANG, TSUNG-LUNG</au><au>SU, HSIANG-SHENG</au><au>KU, CHIN-YU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor Structure And Fabricating Method Thereof</title><date>2017-10-03</date><risdate>2017</risdate><abstract>A method of fabricating a semiconductor structure includes: forming a conductive layer on a first insulating layer; etching a portion of the conductive layer to expose a portion of the first insulating layer; deforming a surface of the portion of the first insulating layer to form a rough surface of the first insulating layer; and removing a residue of the conductive layer on the rough surface of the first insulating layer. 本发明实施例涉及半导体结构及其制造方法。种制造半导体结构的方法,所述方法包含形成传导层于第绝缘层上;蚀刻所述传导层的部分,以暴露所述第绝缘层的部分;变形所述第绝缘层的所述部分的表面,以形成所述第绝缘层的粗糙表面;以及从所述第绝缘层的所述粗糙表面移除所述传导层的残留物。</abstract><oa>free_for_read</oa></addata></record>
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ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor Structure And Fabricating Method Thereof
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