SOI layer varied doped BCD device and manufacturing method thereof
The invention provides an SOI layer varied doped BCD device and manufacturing method thereof. A cellular structure of the device comprises a substrate, an epitaxial layer, an STI isolator, an oxygen buried layer, a P well, a P-type heavily doped region, an N-type heavily doped region, a DMOS source...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides an SOI layer varied doped BCD device and manufacturing method thereof. A cellular structure of the device comprises a substrate, an epitaxial layer, an STI isolator, an oxygen buried layer, a P well, a P-type heavily doped region, an N-type heavily doped region, a DMOS source electrode, a first P-well contact electrode, a DMOS gate electrode, a PMOS gate electrode, an NMOS gate electrode, a PMOS source electrode, a PMOS drain electrode, an NMOS source electrode, an NMOS drain electrode, a DMOS drain electrode, a BJT base electrode, a BJT emitter electrode and a BJT collector electrode. The volume production cost of the product is reduced, and the competitive power of the product is improved; the quantity of current carriers when a DMOS device is in an ON state is increased, the specific on resistance of the DMOS device is further reduced, the loss of the device is reduced, and the performance of the device is improved.
本发明提供种SOI层变掺杂的BCD器件及其制造方法,其元胞结构包括衬底、外延层、STI隔离、埋氧层、P阱、P型重掺杂区、N型重掺杂区、D |
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