A method for photolithography-free self-aligned reverse active etch

A layer of partially planarized organosilicate (DUO) is spin-coated onto a layer of high density plasma (HDP) oxide on a silicon wafer after the shallow trench isolation (STI) is filled with the HDP oxide. Then the DUO layer is etched using a specialized process specifically tuned to etch the DUO an...

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Hauptverfasser: SATO JUSTIN HIROKI, STOM GREGORY ALLEN
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STOM GREGORY ALLEN
description A layer of partially planarized organosilicate (DUO) is spin-coated onto a layer of high density plasma (HDP) oxide on a silicon wafer after the shallow trench isolation (STI) is filled with the HDP oxide. Then the DUO layer is etched using a specialized process specifically tuned to etch the DUO and high density plasma (HDP) oxide at certain selectivity. The higher areas of the wafer topography (active Si areas) have thinner DUO and as the etch process proceeds it starts to etch through the HDP oxide in these areas (active Si areas). The etch process is stopped after a certain depth is reached and before touching down on the silicon nitride oxidation layer. The DUO is removed and a standard chemical-mechanical polish (CMP) is performed on the silicon wafer. After the CMP step the silicon nitride is removed, exposing the silicon substrate between the field oxides. 在浅沟槽隔离STI填充有高密度等离子HDP氧化物之后,将部分经平坦化的有机硅酸盐DUO层旋涂于硅晶片上的HDP氧化物层上。接着,使用专用过程蚀刻所述DUO层,所述专用过程经特定调整而以特定选择性蚀刻DUO及高密度等离子HDP氧化物。晶片表面构形的较高区域(主动Si区域)具有较薄DUO且随着蚀刻
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN107078022A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN107078022A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN107078022A3</originalsourceid><addsrcrecordid>eNrjZHB2VMhNLcnIT1FIyy9SKMjIL8nPyQTy04sSCzIqddOKUlMVilNz0nQTczLT81JTFIpSy1KLilMVEpNLMstSFVJLkjN4GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakm8s5-hgbmBuYWBkZGjMTFqAH9GMnQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>A method for photolithography-free self-aligned reverse active etch</title><source>esp@cenet</source><creator>SATO JUSTIN HIROKI ; STOM GREGORY ALLEN</creator><creatorcontrib>SATO JUSTIN HIROKI ; STOM GREGORY ALLEN</creatorcontrib><description>A layer of partially planarized organosilicate (DUO) is spin-coated onto a layer of high density plasma (HDP) oxide on a silicon wafer after the shallow trench isolation (STI) is filled with the HDP oxide. Then the DUO layer is etched using a specialized process specifically tuned to etch the DUO and high density plasma (HDP) oxide at certain selectivity. The higher areas of the wafer topography (active Si areas) have thinner DUO and as the etch process proceeds it starts to etch through the HDP oxide in these areas (active Si areas). The etch process is stopped after a certain depth is reached and before touching down on the silicon nitride oxidation layer. The DUO is removed and a standard chemical-mechanical polish (CMP) is performed on the silicon wafer. After the CMP step the silicon nitride is removed, exposing the silicon substrate between the field oxides. 在浅沟槽隔离STI填充有高密度等离子HDP氧化物之后,将部分经平坦化的有机硅酸盐DUO层旋涂于硅晶片上的HDP氧化物层上。接着,使用专用过程蚀刻所述DUO层,所述专用过程经特定调整而以特定选择性蚀刻DUO及高密度等离子HDP氧化物。晶片表面构形的较高区域(主动Si区域)具有较薄DUO且随着蚀刻</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170818&amp;DB=EPODOC&amp;CC=CN&amp;NR=107078022A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25544,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170818&amp;DB=EPODOC&amp;CC=CN&amp;NR=107078022A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SATO JUSTIN HIROKI</creatorcontrib><creatorcontrib>STOM GREGORY ALLEN</creatorcontrib><title>A method for photolithography-free self-aligned reverse active etch</title><description>A layer of partially planarized organosilicate (DUO) is spin-coated onto a layer of high density plasma (HDP) oxide on a silicon wafer after the shallow trench isolation (STI) is filled with the HDP oxide. Then the DUO layer is etched using a specialized process specifically tuned to etch the DUO and high density plasma (HDP) oxide at certain selectivity. The higher areas of the wafer topography (active Si areas) have thinner DUO and as the etch process proceeds it starts to etch through the HDP oxide in these areas (active Si areas). The etch process is stopped after a certain depth is reached and before touching down on the silicon nitride oxidation layer. The DUO is removed and a standard chemical-mechanical polish (CMP) is performed on the silicon wafer. After the CMP step the silicon nitride is removed, exposing the silicon substrate between the field oxides. 在浅沟槽隔离STI填充有高密度等离子HDP氧化物之后,将部分经平坦化的有机硅酸盐DUO层旋涂于硅晶片上的HDP氧化物层上。接着,使用专用过程蚀刻所述DUO层,所述专用过程经特定调整而以特定选择性蚀刻DUO及高密度等离子HDP氧化物。晶片表面构形的较高区域(主动Si区域)具有较薄DUO且随着蚀刻</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHB2VMhNLcnIT1FIyy9SKMjIL8nPyQTy04sSCzIqddOKUlMVilNz0nQTczLT81JTFIpSy1KLilMVEpNLMstSFVJLkjN4GFjTEnOKU3mhNDeDoptriLOHbmpBfnxqcUFicmpeakm8s5-hgbmBuYWBkZGjMTFqAH9GMnQ</recordid><startdate>20170818</startdate><enddate>20170818</enddate><creator>SATO JUSTIN HIROKI</creator><creator>STOM GREGORY ALLEN</creator><scope>EVB</scope></search><sort><creationdate>20170818</creationdate><title>A method for photolithography-free self-aligned reverse active etch</title><author>SATO JUSTIN HIROKI ; STOM GREGORY ALLEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN107078022A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>SATO JUSTIN HIROKI</creatorcontrib><creatorcontrib>STOM GREGORY ALLEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SATO JUSTIN HIROKI</au><au>STOM GREGORY ALLEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>A method for photolithography-free self-aligned reverse active etch</title><date>2017-08-18</date><risdate>2017</risdate><abstract>A layer of partially planarized organosilicate (DUO) is spin-coated onto a layer of high density plasma (HDP) oxide on a silicon wafer after the shallow trench isolation (STI) is filled with the HDP oxide. Then the DUO layer is etched using a specialized process specifically tuned to etch the DUO and high density plasma (HDP) oxide at certain selectivity. The higher areas of the wafer topography (active Si areas) have thinner DUO and as the etch process proceeds it starts to etch through the HDP oxide in these areas (active Si areas). The etch process is stopped after a certain depth is reached and before touching down on the silicon nitride oxidation layer. The DUO is removed and a standard chemical-mechanical polish (CMP) is performed on the silicon wafer. After the CMP step the silicon nitride is removed, exposing the silicon substrate between the field oxides. 在浅沟槽隔离STI填充有高密度等离子HDP氧化物之后,将部分经平坦化的有机硅酸盐DUO层旋涂于硅晶片上的HDP氧化物层上。接着,使用专用过程蚀刻所述DUO层,所述专用过程经特定调整而以特定选择性蚀刻DUO及高密度等离子HDP氧化物。晶片表面构形的较高区域(主动Si区域)具有较薄DUO且随着蚀刻</abstract><oa>free_for_read</oa></addata></record>
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ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title A method for photolithography-free self-aligned reverse active etch
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