Load balancing structure realization method based on feedback and reverse transmission mechanism
The invention discloses a load balancing structure realization method based on a feedback and reverse transmission mechanism. Both an input buffer and an intermediate buffer adopt a VOQ buffer mode; a middle port enables buffer queue information to be fed back an input port in the same line card thr...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | GAO JING GUO YUBO WU RIGENG FENG XIAOLONG SHEN ZHIJUN |
description | The invention discloses a load balancing structure realization method based on a feedback and reverse transmission mechanism. Both an input buffer and an intermediate buffer adopt a VOQ buffer mode; a middle port enables buffer queue information to be fed back an input port in the same line card through an output port at each time slot; the input port enables scheduling result information thereof to be transferred through the middle port, and then, reversely transmitted to an adjacent input port through a first-stage crossbar at each time slot; the input port receives and processes target port buffer queue information obtained through feedback and the scheduling result information of the adjacent input port obtained through transfer in the beginning of each time slot, and then, carries out algorithm scheduling by combining local buffer queue information; and final determination is carried out between an algorithm scheduling result of the input port and a cell reached at the current time slot to determine a ce |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN106936732A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN106936732A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN106936732A3</originalsourceid><addsrcrecordid>eNqNyzEKwkAQheE0FqLeYTyAoAYilhIUC7Gyj5Pdl2QxmQ07GwtPb0QPYPX44XvT5H7xbKnklsU4qUljGEwcAiiAW_fi6LxQh9j4D1NYGrsCbMnmQSx2hE8EBcXAop1T_T5Mw-K0myeTilvF4rezZHk63vLzCr0voD0bCGKRXzfrbJ9mu3R7SP8xbwx6PfM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Load balancing structure realization method based on feedback and reverse transmission mechanism</title><source>esp@cenet</source><creator>GAO JING ; GUO YUBO ; WU RIGENG ; FENG XIAOLONG ; SHEN ZHIJUN</creator><creatorcontrib>GAO JING ; GUO YUBO ; WU RIGENG ; FENG XIAOLONG ; SHEN ZHIJUN</creatorcontrib><description>The invention discloses a load balancing structure realization method based on a feedback and reverse transmission mechanism. Both an input buffer and an intermediate buffer adopt a VOQ buffer mode; a middle port enables buffer queue information to be fed back an input port in the same line card through an output port at each time slot; the input port enables scheduling result information thereof to be transferred through the middle port, and then, reversely transmitted to an adjacent input port through a first-stage crossbar at each time slot; the input port receives and processes target port buffer queue information obtained through feedback and the scheduling result information of the adjacent input port obtained through transfer in the beginning of each time slot, and then, carries out algorithm scheduling by combining local buffer queue information; and final determination is carried out between an algorithm scheduling result of the input port and a cell reached at the current time slot to determine a ce</description><language>chi ; eng</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170707&DB=EPODOC&CC=CN&NR=106936732A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170707&DB=EPODOC&CC=CN&NR=106936732A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GAO JING</creatorcontrib><creatorcontrib>GUO YUBO</creatorcontrib><creatorcontrib>WU RIGENG</creatorcontrib><creatorcontrib>FENG XIAOLONG</creatorcontrib><creatorcontrib>SHEN ZHIJUN</creatorcontrib><title>Load balancing structure realization method based on feedback and reverse transmission mechanism</title><description>The invention discloses a load balancing structure realization method based on a feedback and reverse transmission mechanism. Both an input buffer and an intermediate buffer adopt a VOQ buffer mode; a middle port enables buffer queue information to be fed back an input port in the same line card through an output port at each time slot; the input port enables scheduling result information thereof to be transferred through the middle port, and then, reversely transmitted to an adjacent input port through a first-stage crossbar at each time slot; the input port receives and processes target port buffer queue information obtained through feedback and the scheduling result information of the adjacent input port obtained through transfer in the beginning of each time slot, and then, carries out algorithm scheduling by combining local buffer queue information; and final determination is carried out between an algorithm scheduling result of the input port and a cell reached at the current time slot to determine a ce</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyzEKwkAQheE0FqLeYTyAoAYilhIUC7Gyj5Pdl2QxmQ07GwtPb0QPYPX44XvT5H7xbKnklsU4qUljGEwcAiiAW_fi6LxQh9j4D1NYGrsCbMnmQSx2hE8EBcXAop1T_T5Mw-K0myeTilvF4rezZHk63vLzCr0voD0bCGKRXzfrbJ9mu3R7SP8xbwx6PfM</recordid><startdate>20170707</startdate><enddate>20170707</enddate><creator>GAO JING</creator><creator>GUO YUBO</creator><creator>WU RIGENG</creator><creator>FENG XIAOLONG</creator><creator>SHEN ZHIJUN</creator><scope>EVB</scope></search><sort><creationdate>20170707</creationdate><title>Load balancing structure realization method based on feedback and reverse transmission mechanism</title><author>GAO JING ; GUO YUBO ; WU RIGENG ; FENG XIAOLONG ; SHEN ZHIJUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN106936732A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2017</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>GAO JING</creatorcontrib><creatorcontrib>GUO YUBO</creatorcontrib><creatorcontrib>WU RIGENG</creatorcontrib><creatorcontrib>FENG XIAOLONG</creatorcontrib><creatorcontrib>SHEN ZHIJUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GAO JING</au><au>GUO YUBO</au><au>WU RIGENG</au><au>FENG XIAOLONG</au><au>SHEN ZHIJUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Load balancing structure realization method based on feedback and reverse transmission mechanism</title><date>2017-07-07</date><risdate>2017</risdate><abstract>The invention discloses a load balancing structure realization method based on a feedback and reverse transmission mechanism. Both an input buffer and an intermediate buffer adopt a VOQ buffer mode; a middle port enables buffer queue information to be fed back an input port in the same line card through an output port at each time slot; the input port enables scheduling result information thereof to be transferred through the middle port, and then, reversely transmitted to an adjacent input port through a first-stage crossbar at each time slot; the input port receives and processes target port buffer queue information obtained through feedback and the scheduling result information of the adjacent input port obtained through transfer in the beginning of each time slot, and then, carries out algorithm scheduling by combining local buffer queue information; and final determination is carried out between an algorithm scheduling result of the input port and a cell reached at the current time slot to determine a ce</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_CN106936732A |
source | esp@cenet |
subjects | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | Load balancing structure realization method based on feedback and reverse transmission mechanism |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-21T15%3A02%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GAO%20JING&rft.date=2017-07-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN106936732A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |