ELECTRICALLY ERASABLE PHASE CHANGE MEMORY
An electrically erasable phase change memory utilizing a stoichiometrically balanced phase change material in which both the switching times and the switching energies required for the transitions between the amorphous and the crystalline states are substantially reduced below those attainable with...
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| creator | W. CZUBATYJ S. R. OVSHINSKY S. J. HUDGENS |
| description | An electrically erasable phase change memory utilizing a stoichiometrically balanced phase change material in which both the switching times and the switching energies required for the transitions between the amorphous and the crystalline states are substantially reduced below those attainable with prior art electrically erasable phase change memories. One embodiment of the invention comprises an integrated circuit implementation of the memory in a high bit density configuration in which manufacturing costs are correspondingly reduced and performance parameters are further improved. |
| format | Patent |
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HUDGENS</creatorcontrib><description>An electrically erasable phase change memory utilizing a stoichiometrically balanced phase change material in which both the switching times and the switching energies required for the transitions between the amorphous and the crystalline states are substantially reduced below those attainable with prior art electrically erasable phase change memories. One embodiment of the invention comprises an integrated circuit implementation of the memory in a high bit density configuration in which manufacturing costs are correspondingly reduced and performance parameters are further improved.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC SWITCHES ; ELECTRICITY ; EMERGENCY PROTECTIVE DEVICES ; INFORMATION STORAGE ; PHYSICS ; RELAYS ; SELECTORS ; SEMICONDUCTOR DEVICES ; STATIC STORES</subject><creationdate>1992</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19920909&DB=EPODOC&CC=CN&NR=1064366A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19920909&DB=EPODOC&CC=CN&NR=1064366A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>W. 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One embodiment of the invention comprises an integrated circuit implementation of the memory in a high bit density configuration in which manufacturing costs are correspondingly reduced and performance parameters are further improved.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC SWITCHES</subject><subject>ELECTRICITY</subject><subject>EMERGENCY PROTECTIVE DEVICES</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>RELAYS</subject><subject>SELECTORS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1992</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNB09XF1DgnydHb08YlUcA1yDHZ08nFVCPBwDHZVcPZw9HN3VfB19fUPiuRhYE1LzClO5YXS3Azybq4hzh66qQX58anFBYnJqXmpJfHOfoYGZibGZmaOxoRVAACVyiNs</recordid><startdate>19920909</startdate><enddate>19920909</enddate><creator>W. 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OVSHINSKY</creatorcontrib><creatorcontrib>S. J. HUDGENS</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>W. CZUBATYJ</au><au>S. R. OVSHINSKY</au><au>S. J. HUDGENS</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ELECTRICALLY ERASABLE PHASE CHANGE MEMORY</title><date>1992-09-09</date><risdate>1992</risdate><abstract>An electrically erasable phase change memory utilizing a stoichiometrically balanced phase change material in which both the switching times and the switching energies required for the transitions between the amorphous and the crystalline states are substantially reduced below those attainable with prior art electrically erasable phase change memories. One embodiment of the invention comprises an integrated circuit implementation of the memory in a high bit density configuration in which manufacturing costs are correspondingly reduced and performance parameters are further improved.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC SWITCHES ELECTRICITY EMERGENCY PROTECTIVE DEVICES INFORMATION STORAGE PHYSICS RELAYS SELECTORS SEMICONDUCTOR DEVICES STATIC STORES |
| title | ELECTRICALLY ERASABLE PHASE CHANGE MEMORY |
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