Hardware acceleration for inline caches in dynamic languages
Aspects include apparatuses, systems, and methods for hardware acceleration for inline caches in dynamic languages. An inline cache may be initialized for an instance of a dynamic software operation. A call of an initialized instance of the dynamic software operation may be executed by an inline cac...
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| creator | CASCAVAL GHEORGHE CALIN KEDLAYA MADHUKAR NAGARAJA ROBATMILI BEHNAM SUAREZ GRACIA DARIO |
| description | Aspects include apparatuses, systems, and methods for hardware acceleration for inline caches in dynamic languages. An inline cache may be initialized for an instance of a dynamic software operation. A call of an initialized instance of the dynamic software operation may be executed by an inline cache hardware accelerator. The inline cache may be checked to determine that its data is current. When the data is current, the initialized instance of the dynamic software operation may be executed using the related inline cache data. When the data is not current, a new inline cache may be initialized for the instance of the dynamic software operation, including the not current data of a previously initialized instance of the dynamic software operation. The inline cache hardware accelerator may include an inline cache memory, a coprocessor, and/or a functional until one an inline cache pipeline connected to a processor pipeline.
各方面包括用于动态语言中的内联高速缓存的硬件加速的装置、系统和方法。可以针对动态软件操作的实例来初始化内联高速缓存。可以由内联高速缓存硬件加速器来执行对动态软件操作的经初始化的 |
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各方面包括用于动态语言中的内联高速缓存的硬件加速的装置、系统和方法。可以针对动态软件操作的实例来初始化内联高速缓存。可以由内联高速缓存硬件加速器来执行对动态软件操作的经初始化的</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Hardware acceleration for inline caches in dynamic languages |
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