A tester with mixed protocol engine in a FPGA block

Automated test equipment capable of performing a high-speed test of semiconductor devices is presented. The automated test equipment comprises a system controller for controlling a test program, wherein the system controller is coupled to a bus. The tester system further comprises a plurality of mod...

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Bibliographische Detailangaben
Hauptverfasser: NIEMIC ANDREW, FREDIANI JOHN
Format: Patent
Sprache:eng
Schlagworte:
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