Semiconductor structure

The invention discloses a semiconductor structure. The semiconductor structure comprises a substrate with a first conduction type, a deep well with a second conduction type, a first well with the first conduction type, a second well with the second conduction type, a grid electrode, a first insulato...

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Hauptverfasser: XU MINGSHUN, XIAO SHIYING, WANG ZHICHONG, LI QIUDE, CAI SUHUA, LIN KEFENG, LIAO XUANBO, HUANG SHITENG, LIN SHUWEN
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creator XU MINGSHUN
XIAO SHIYING
WANG ZHICHONG
LI QIUDE
CAI SUHUA
LIN KEFENG
LIAO XUANBO
HUANG SHITENG
LIN SHUWEN
description The invention discloses a semiconductor structure. The semiconductor structure comprises a substrate with a first conduction type, a deep well with a second conduction type, a first well with the first conduction type, a second well with the second conduction type, a grid electrode, a first insulator and a second insulator, wherein the deep well is formed inside the substrate and extends downwards from the surface of the substrate; the first well and the second well extend downwards from the surface of the substrate to be formed in the deep well; the first well is separated from the first well; the grid electrode is formed on the substrate and arranged between the first well and the second well; the first insulator extends downwards from the surface of the substrate and is formed between the grid electrode and the second well; the second insulator extends downwards from the surface of the substrate and is adjoined with the first well; the ratio of the depth of the first insulator to the depth of the second insulator is less than 1.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN104659092A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN104659092A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN104659092A3</originalsourceid><addsrcrecordid>eNrjZBAPTs3NTM7PSylNLskvUiguKQIySotSeRhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJvLOfoYGJmamlgaWRozExagAAdCJ2</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor structure</title><source>esp@cenet</source><creator>XU MINGSHUN ; XIAO SHIYING ; WANG ZHICHONG ; LI QIUDE ; CAI SUHUA ; LIN KEFENG ; LIAO XUANBO ; HUANG SHITENG ; LIN SHUWEN</creator><creatorcontrib>XU MINGSHUN ; XIAO SHIYING ; WANG ZHICHONG ; LI QIUDE ; CAI SUHUA ; LIN KEFENG ; LIAO XUANBO ; HUANG SHITENG ; LIN SHUWEN</creatorcontrib><description>The invention discloses a semiconductor structure. The semiconductor structure comprises a substrate with a first conduction type, a deep well with a second conduction type, a first well with the first conduction type, a second well with the second conduction type, a grid electrode, a first insulator and a second insulator, wherein the deep well is formed inside the substrate and extends downwards from the surface of the substrate; the first well and the second well extend downwards from the surface of the substrate to be formed in the deep well; the first well is separated from the first well; the grid electrode is formed on the substrate and arranged between the first well and the second well; the first insulator extends downwards from the surface of the substrate and is formed between the grid electrode and the second well; the second insulator extends downwards from the surface of the substrate and is adjoined with the first well; the ratio of the depth of the first insulator to the depth of the second insulator is less than 1.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150527&amp;DB=EPODOC&amp;CC=CN&amp;NR=104659092A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150527&amp;DB=EPODOC&amp;CC=CN&amp;NR=104659092A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>XU MINGSHUN</creatorcontrib><creatorcontrib>XIAO SHIYING</creatorcontrib><creatorcontrib>WANG ZHICHONG</creatorcontrib><creatorcontrib>LI QIUDE</creatorcontrib><creatorcontrib>CAI SUHUA</creatorcontrib><creatorcontrib>LIN KEFENG</creatorcontrib><creatorcontrib>LIAO XUANBO</creatorcontrib><creatorcontrib>HUANG SHITENG</creatorcontrib><creatorcontrib>LIN SHUWEN</creatorcontrib><title>Semiconductor structure</title><description>The invention discloses a semiconductor structure. The semiconductor structure comprises a substrate with a first conduction type, a deep well with a second conduction type, a first well with the first conduction type, a second well with the second conduction type, a grid electrode, a first insulator and a second insulator, wherein the deep well is formed inside the substrate and extends downwards from the surface of the substrate; the first well and the second well extend downwards from the surface of the substrate to be formed in the deep well; the first well is separated from the first well; the grid electrode is formed on the substrate and arranged between the first well and the second well; the first insulator extends downwards from the surface of the substrate and is formed between the grid electrode and the second well; the second insulator extends downwards from the surface of the substrate and is adjoined with the first well; the ratio of the depth of the first insulator to the depth of the second insulator is less than 1.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAPTs3NTM7PSylNLskvUiguKQIySotSeRhY0xJzilN5oTQ3g6Kba4izh25qQX58anFBYnJqXmpJvLOfoYGJmamlgaWRozExagAAdCJ2</recordid><startdate>20150527</startdate><enddate>20150527</enddate><creator>XU MINGSHUN</creator><creator>XIAO SHIYING</creator><creator>WANG ZHICHONG</creator><creator>LI QIUDE</creator><creator>CAI SUHUA</creator><creator>LIN KEFENG</creator><creator>LIAO XUANBO</creator><creator>HUANG SHITENG</creator><creator>LIN SHUWEN</creator><scope>EVB</scope></search><sort><creationdate>20150527</creationdate><title>Semiconductor structure</title><author>XU MINGSHUN ; XIAO SHIYING ; WANG ZHICHONG ; LI QIUDE ; CAI SUHUA ; LIN KEFENG ; LIAO XUANBO ; HUANG SHITENG ; LIN SHUWEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN104659092A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>XU MINGSHUN</creatorcontrib><creatorcontrib>XIAO SHIYING</creatorcontrib><creatorcontrib>WANG ZHICHONG</creatorcontrib><creatorcontrib>LI QIUDE</creatorcontrib><creatorcontrib>CAI SUHUA</creatorcontrib><creatorcontrib>LIN KEFENG</creatorcontrib><creatorcontrib>LIAO XUANBO</creatorcontrib><creatorcontrib>HUANG SHITENG</creatorcontrib><creatorcontrib>LIN SHUWEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>XU MINGSHUN</au><au>XIAO SHIYING</au><au>WANG ZHICHONG</au><au>LI QIUDE</au><au>CAI SUHUA</au><au>LIN KEFENG</au><au>LIAO XUANBO</au><au>HUANG SHITENG</au><au>LIN SHUWEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor structure</title><date>2015-05-27</date><risdate>2015</risdate><abstract>The invention discloses a semiconductor structure. The semiconductor structure comprises a substrate with a first conduction type, a deep well with a second conduction type, a first well with the first conduction type, a second well with the second conduction type, a grid electrode, a first insulator and a second insulator, wherein the deep well is formed inside the substrate and extends downwards from the surface of the substrate; the first well and the second well extend downwards from the surface of the substrate to be formed in the deep well; the first well is separated from the first well; the grid electrode is formed on the substrate and arranged between the first well and the second well; the first insulator extends downwards from the surface of the substrate and is formed between the grid electrode and the second well; the second insulator extends downwards from the surface of the substrate and is adjoined with the first well; the ratio of the depth of the first insulator to the depth of the second insulator is less than 1.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Semiconductor structure
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T17%3A28%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=XU%20MINGSHUN&rft.date=2015-05-27&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN104659092A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true