Leakage reducing writeline charge protection circuit

Leakage reducing writeline charge protection circuit

Methods and systems of fabricating a wordline protection structure are described. As described, the wordline protection structure includes a polysilicon structure formed adjacent to a memory core region. The polysilicon structure includes first doped region positioned on a core side of the polysilic...

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Hauptverfasser: SHIRAIWA HIDEHIKO, RANDOLPH MARK W, CHUNG SUNG-YOUNG, DAVIS BRADLEY MARC
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator SHIRAIWA HIDEHIKO
RANDOLPH MARK W
CHUNG SUNG-YOUNG
DAVIS BRADLEY MARC
description Methods and systems of fabricating a wordline protection structure are described. As described, the wordline protection structure includes a polysilicon structure formed adjacent to a memory core region. The polysilicon structure includes first doped region positioned on a core side of the polysilicon structure and a second doped region positioned on a spine side of the polysilicon structure. An un-doped region positioned between the first and second doped regions. A conductive layer is formed on top of the polysilicon structure and arranged so that it does not contact the un-doped region at either the transition between the first doped region and the un-doped region or the second doped region and un-doped region.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Leakage reducing writeline charge protection circuit
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