Automatic time-slot level control system and implementation method thereof

The invention provides an automatic time-slot level control system and an implementation method thereof. The automatic time-slot level control system a numerically-controlled attenuator, an analog-digital converter and an FPGA. The numerically-controlled attenuator is used for attenuating the power of simulation intermediate frequency signals. The analog-digital converter is used for completing analog-digital conversion of the intermediate frequency signals. The FPGA is used for completing power statistics of time-slot signals, selection of high-power time-slot signals, controlling attenuation of the numerically-controlled attenuator and amplifying the digital domain of the time-slot signals. The automatic time-slot level control system has the advantages that through cooperation of hardware (the numerically-controlled attenuator) and software (FPGA digital gain control), the high-power time-slot level can be controlled, and the small-power time-slot level does not attenuate. The automatic time-slot level con