Verification platform and verification method for ARINC659 bus fault-tolerant circuit
The invention relates to a verification platform and a verification method for an ARINC659 bus fault-tolerant circuit. The verification platform comprises a host testing module, a break detection processing module, a host bus, an ARINC659 bus fault-tolerant circuit to be tested, a clock resetting mo...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to a verification platform and a verification method for an ARINC659 bus fault-tolerant circuit. The verification platform comprises a host testing module, a break detection processing module, a host bus, an ARINC659 bus fault-tolerant circuit to be tested, a clock resetting module, a memory module, a transceiver module, an ARINC659 bus, a fault injection verification module and a bus signal detection module, wherein the host testing module and the break detection processing module are connected to the ARINC659 bus fault-tolerant circuit to be tested through the host bus respectively; the fault injection verification module and the bus signal detection module are connected to the ARINC659 bus fault-tolerant circuit through the ARINC659 bus respectively; the clock resetting module and the memory module are connected to the ARINC659 bus fault-tolerant circuit respectively. According to the verification platform and the verification method for the ARINC659 bus fault-tolerant circuit, an ARI |
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