Printed circuit board (PCB) signal group delay analysis system and method
The invention discloses a printed circuit board (PCB) signal group delay analysis system and a PCB signal group delay analysis method. The method comprises the following steps of: measuring S parameters of a data signal line and a clock signal line from the PCB; normalizing a connecting port between...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a printed circuit board (PCB) signal group delay analysis system and a PCB signal group delay analysis method. The method comprises the following steps of: measuring S parameters of a data signal line and a clock signal line from the PCB; normalizing a connecting port between the data signal line and the clock signal line by analyzing the S parameters; analyzing an S parameter differential mode of the data signal line and the clock signal line; calculating the first group delay of the data signal line according to the data transmission frequency and S parameter differential mode of the data signal line; calculating the second group delay of the clock signal line according to the clock frequency and S parameter differential mode of the clock signal line; calculating the group delay time difference of the first group delay and the second group delay; and displaying the group delay between the data signal line and the clock signal line on display equipment when the group delay time differ |
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