Memory management apparatus, memory management method and control program

If it is determined in step S51 that allocation for an instruction part has been requested and it is determined in step S52 that a memory use amount of an instruction part of an allocation target program exceeds an upper limit, a memory area that is being used by the instruction part of the allocati...

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Hauptverfasser: TAKAHASHI KATSUYA, TAMORI MASAHIRO, KAMINAGA HIROKI, ICHIMORI SEIYA, KOMATSUZAKI YORIKO
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creator TAKAHASHI KATSUYA
TAMORI MASAHIRO
KAMINAGA HIROKI
ICHIMORI SEIYA
KOMATSUZAKI YORIKO
description If it is determined in step S51 that allocation for an instruction part has been requested and it is determined in step S52 that a memory use amount of an instruction part of an allocation target program exceeds an upper limit, a memory area that is being used by the instruction part of the allocation target program is released in step S53 and memory allocation for the instruction part is performed in step S54. If it is determined in step S52 that the memory use amount of the instruction part of the allocation target program does not exceed the upper limit, the process in step S53 is skipped. If it is determined in step S51 that allocation for a data part is requested, a normal memory allocation process is performed in step S55. The present disclosure may be applied to, for example, an embedded device.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN102789433A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN102789433A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN102789433A3</originalsourceid><addsrcrecordid>eNrjZPD0Tc3NL6pUyE3MS0xPzU3NK1FILChILEosKS3WUcjFkMxNLcnIT1FIzEtRSM7PKynKz1EoKMpPL0rM5WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8c5-hgZG5haWJsbGjsbEqAEAHrU1MA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Memory management apparatus, memory management method and control program</title><source>esp@cenet</source><creator>TAKAHASHI KATSUYA ; TAMORI MASAHIRO ; KAMINAGA HIROKI ; ICHIMORI SEIYA ; KOMATSUZAKI YORIKO</creator><creatorcontrib>TAKAHASHI KATSUYA ; TAMORI MASAHIRO ; KAMINAGA HIROKI ; ICHIMORI SEIYA ; KOMATSUZAKI YORIKO</creatorcontrib><description>If it is determined in step S51 that allocation for an instruction part has been requested and it is determined in step S52 that a memory use amount of an instruction part of an allocation target program exceeds an upper limit, a memory area that is being used by the instruction part of the allocation target program is released in step S53 and memory allocation for the instruction part is performed in step S54. If it is determined in step S52 that the memory use amount of the instruction part of the allocation target program does not exceed the upper limit, the process in step S53 is skipped. If it is determined in step S51 that allocation for a data part is requested, a normal memory allocation process is performed in step S55. The present disclosure may be applied to, for example, an embedded device.</description><language>chi ; eng</language><subject>CALCULATING ; CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC ; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS ; PHYSICS ; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS ; TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20121121&amp;DB=EPODOC&amp;CC=CN&amp;NR=102789433A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20121121&amp;DB=EPODOC&amp;CC=CN&amp;NR=102789433A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TAKAHASHI KATSUYA</creatorcontrib><creatorcontrib>TAMORI MASAHIRO</creatorcontrib><creatorcontrib>KAMINAGA HIROKI</creatorcontrib><creatorcontrib>ICHIMORI SEIYA</creatorcontrib><creatorcontrib>KOMATSUZAKI YORIKO</creatorcontrib><title>Memory management apparatus, memory management method and control program</title><description>If it is determined in step S51 that allocation for an instruction part has been requested and it is determined in step S52 that a memory use amount of an instruction part of an allocation target program exceeds an upper limit, a memory area that is being used by the instruction part of the allocation target program is released in step S53 and memory allocation for the instruction part is performed in step S54. If it is determined in step S52 that the memory use amount of the instruction part of the allocation target program does not exceed the upper limit, the process in step S53 is skipped. If it is determined in step S51 that allocation for a data part is requested, a normal memory allocation process is performed in step S55. The present disclosure may be applied to, for example, an embedded device.</description><subject>CALCULATING</subject><subject>CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</subject><subject>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</subject><subject>PHYSICS</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><subject>TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPD0Tc3NL6pUyE3MS0xPzU3NK1FILChILEosKS3WUcjFkMxNLcnIT1FIzEtRSM7PKynKz1EoKMpPL0rM5WFgTUvMKU7lhdLcDIpuriHOHrqpBfnxqcUFicmpeakl8c5-hgZG5haWJsbGjsbEqAEAHrU1MA</recordid><startdate>20121121</startdate><enddate>20121121</enddate><creator>TAKAHASHI KATSUYA</creator><creator>TAMORI MASAHIRO</creator><creator>KAMINAGA HIROKI</creator><creator>ICHIMORI SEIYA</creator><creator>KOMATSUZAKI YORIKO</creator><scope>EVB</scope></search><sort><creationdate>20121121</creationdate><title>Memory management apparatus, memory management method and control program</title><author>TAKAHASHI KATSUYA ; TAMORI MASAHIRO ; KAMINAGA HIROKI ; ICHIMORI SEIYA ; KOMATSUZAKI YORIKO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN102789433A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2012</creationdate><topic>CALCULATING</topic><topic>CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</topic><topic>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</topic><topic>PHYSICS</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</topic><topic>TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</topic><toplevel>online_resources</toplevel><creatorcontrib>TAKAHASHI KATSUYA</creatorcontrib><creatorcontrib>TAMORI MASAHIRO</creatorcontrib><creatorcontrib>KAMINAGA HIROKI</creatorcontrib><creatorcontrib>ICHIMORI SEIYA</creatorcontrib><creatorcontrib>KOMATSUZAKI YORIKO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TAKAHASHI KATSUYA</au><au>TAMORI MASAHIRO</au><au>KAMINAGA HIROKI</au><au>ICHIMORI SEIYA</au><au>KOMATSUZAKI YORIKO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Memory management apparatus, memory management method and control program</title><date>2012-11-21</date><risdate>2012</risdate><abstract>If it is determined in step S51 that allocation for an instruction part has been requested and it is determined in step S52 that a memory use amount of an instruction part of an allocation target program exceeds an upper limit, a memory area that is being used by the instruction part of the allocation target program is released in step S53 and memory allocation for the instruction part is performed in step S54. If it is determined in step S52 that the memory use amount of the instruction part of the allocation target program does not exceed the upper limit, the process in step S53 is skipped. If it is determined in step S51 that allocation for a data part is requested, a normal memory allocation process is performed in step S55. The present disclosure may be applied to, for example, an embedded device.</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS
PHYSICS
TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE
title Memory management apparatus, memory management method and control program
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