Device and method for automatically resetting FPGA (field programmable gate array)
The invention provides a device for automatically resetting an FPGA (field programmable gate array), comprising a signal collector and a first signal generator. When file configuration is finished by FPGA, a load success signal is sent to a memory to stop the work of the memory, and at the moment, t...
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Format: | Patent |
Sprache: | chi ; eng |
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