Methods for forming NMOS epi layers

NMOS transistors having controlled channel strain and junction resistance and methods for the fabrication of same are provided herein. In some embodiments, a method for forming an NMOS transistor may include (a) providing a substrate having a p-type silicon region; (b) depositing a silicon seed laye...

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Hauptverfasser:	FELCH SUSAN B, TAYLOR MITCHELL C
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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