Capacitor loading structure with integrity-improved system-level packaged signals

The invention relates to a capacitor loading structure with integrity-improved system-level packaged signals in the technical field of electrons. A reference plane under a loading capacitor is partially hollowed, a reference plane under a blocking MLCC (Multiplayer Ceramic Chip Capacitor) is also ho...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LAI QIANGTAO, MAO JUNFA
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES
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