Entire bus controller for series hybrid power buses
The invention relates to an entire bus controller for series hybrid power buses, which comprises a microprocessor CPU, wherein the signal input end of the microprocessor CPU is respectively connected with an analog input circuit, a switching value input circuit and a CAN communication interface; the...
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creator | QIN LINLIN LI REN WANG JIANGAN SHI CHUN WANG SHAOKAI CHEN SHUNDONG LING QING WU GANG DING CHUANJI |
description | The invention relates to an entire bus controller for series hybrid power buses, which comprises a microprocessor CPU, wherein the signal input end of the microprocessor CPU is respectively connected with an analog input circuit, a switching value input circuit and a CAN communication interface; the signal output end of the microprocessor CPU is respectively connected with a PWM module, a switching value output circuit and a communication circuit; and a power management module supplies power to the microprocessor CPU. The microprocessor CPU has the advantages of high processing speed and abundant interface resources, especially designs interface circuits for the automobile field, fully considers the interference in the hybrid power bus, and has higher interference resistance capacity and higher stability. The entire bus controller has the advantages of complete functions and strong adaptability, and provides a stable and reliable hardware platform for the entire vehicle control algorithm of series hybrid powe |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN101961997A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN101961997A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN101961997A3</originalsourceid><addsrcrecordid>eNrjZDB2zSvJLEpVSCotVkjOzyspys_JSS1SSMsvUihOLcpMLVbIqEwqykxRKMgvB4oDlaUW8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSSeGc_QwNDSzNDS0tzR2Ni1AAAD0UsqA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Entire bus controller for series hybrid power buses</title><source>esp@cenet</source><creator>QIN LINLIN ; LI REN ; WANG JIANGAN ; SHI CHUN ; WANG SHAOKAI ; CHEN SHUNDONG ; LING QING ; WU GANG ; DING CHUANJI</creator><creatorcontrib>QIN LINLIN ; LI REN ; WANG JIANGAN ; SHI CHUN ; WANG SHAOKAI ; CHEN SHUNDONG ; LING QING ; WU GANG ; DING CHUANJI</creatorcontrib><description>The invention relates to an entire bus controller for series hybrid power buses, which comprises a microprocessor CPU, wherein the signal input end of the microprocessor CPU is respectively connected with an analog input circuit, a switching value input circuit and a CAN communication interface; the signal output end of the microprocessor CPU is respectively connected with a PWM module, a switching value output circuit and a communication circuit; and a power management module supplies power to the microprocessor CPU. The microprocessor CPU has the advantages of high processing speed and abundant interface resources, especially designs interface circuits for the automobile field, fully considers the interference in the hybrid power bus, and has higher interference resistance capacity and higher stability. The entire bus controller has the advantages of complete functions and strong adaptability, and provides a stable and reliable hardware platform for the entire vehicle control algorithm of series hybrid powe</description><language>chi ; eng</language><subject>PERFORMING OPERATIONS ; TRANSPORTING ; VEHICLES IN GENERAL ; VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISEPROVIDED FOR</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110202&DB=EPODOC&CC=CN&NR=101961997A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110202&DB=EPODOC&CC=CN&NR=101961997A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>QIN LINLIN</creatorcontrib><creatorcontrib>LI REN</creatorcontrib><creatorcontrib>WANG JIANGAN</creatorcontrib><creatorcontrib>SHI CHUN</creatorcontrib><creatorcontrib>WANG SHAOKAI</creatorcontrib><creatorcontrib>CHEN SHUNDONG</creatorcontrib><creatorcontrib>LING QING</creatorcontrib><creatorcontrib>WU GANG</creatorcontrib><creatorcontrib>DING CHUANJI</creatorcontrib><title>Entire bus controller for series hybrid power buses</title><description>The invention relates to an entire bus controller for series hybrid power buses, which comprises a microprocessor CPU, wherein the signal input end of the microprocessor CPU is respectively connected with an analog input circuit, a switching value input circuit and a CAN communication interface; the signal output end of the microprocessor CPU is respectively connected with a PWM module, a switching value output circuit and a communication circuit; and a power management module supplies power to the microprocessor CPU. The microprocessor CPU has the advantages of high processing speed and abundant interface resources, especially designs interface circuits for the automobile field, fully considers the interference in the hybrid power bus, and has higher interference resistance capacity and higher stability. The entire bus controller has the advantages of complete functions and strong adaptability, and provides a stable and reliable hardware platform for the entire vehicle control algorithm of series hybrid powe</description><subject>PERFORMING OPERATIONS</subject><subject>TRANSPORTING</subject><subject>VEHICLES IN GENERAL</subject><subject>VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISEPROVIDED FOR</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDB2zSvJLEpVSCotVkjOzyspys_JSS1SSMsvUihOLcpMLVbIqEwqykxRKMgvB4oDlaUW8zCwpiXmFKfyQmluBkU31xBnD93Ugvz41OKCxOTUvNSSeGc_QwNDSzNDS0tzR2Ni1AAAD0UsqA</recordid><startdate>20110202</startdate><enddate>20110202</enddate><creator>QIN LINLIN</creator><creator>LI REN</creator><creator>WANG JIANGAN</creator><creator>SHI CHUN</creator><creator>WANG SHAOKAI</creator><creator>CHEN SHUNDONG</creator><creator>LING QING</creator><creator>WU GANG</creator><creator>DING CHUANJI</creator><scope>EVB</scope></search><sort><creationdate>20110202</creationdate><title>Entire bus controller for series hybrid power buses</title><author>QIN LINLIN ; LI REN ; WANG JIANGAN ; SHI CHUN ; WANG SHAOKAI ; CHEN SHUNDONG ; LING QING ; WU GANG ; DING CHUANJI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN101961997A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2011</creationdate><topic>PERFORMING OPERATIONS</topic><topic>TRANSPORTING</topic><topic>VEHICLES IN GENERAL</topic><topic>VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISEPROVIDED FOR</topic><toplevel>online_resources</toplevel><creatorcontrib>QIN LINLIN</creatorcontrib><creatorcontrib>LI REN</creatorcontrib><creatorcontrib>WANG JIANGAN</creatorcontrib><creatorcontrib>SHI CHUN</creatorcontrib><creatorcontrib>WANG SHAOKAI</creatorcontrib><creatorcontrib>CHEN SHUNDONG</creatorcontrib><creatorcontrib>LING QING</creatorcontrib><creatorcontrib>WU GANG</creatorcontrib><creatorcontrib>DING CHUANJI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>QIN LINLIN</au><au>LI REN</au><au>WANG JIANGAN</au><au>SHI CHUN</au><au>WANG SHAOKAI</au><au>CHEN SHUNDONG</au><au>LING QING</au><au>WU GANG</au><au>DING CHUANJI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Entire bus controller for series hybrid power buses</title><date>2011-02-02</date><risdate>2011</risdate><abstract>The invention relates to an entire bus controller for series hybrid power buses, which comprises a microprocessor CPU, wherein the signal input end of the microprocessor CPU is respectively connected with an analog input circuit, a switching value input circuit and a CAN communication interface; the signal output end of the microprocessor CPU is respectively connected with a PWM module, a switching value output circuit and a communication circuit; and a power management module supplies power to the microprocessor CPU. The microprocessor CPU has the advantages of high processing speed and abundant interface resources, especially designs interface circuits for the automobile field, fully considers the interference in the hybrid power bus, and has higher interference resistance capacity and higher stability. The entire bus controller has the advantages of complete functions and strong adaptability, and provides a stable and reliable hardware platform for the entire vehicle control algorithm of series hybrid powe</abstract><oa>free_for_read</oa></addata></record> |
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language | chi ; eng |
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subjects | PERFORMING OPERATIONS TRANSPORTING VEHICLES IN GENERAL VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISEPROVIDED FOR |
title | Entire bus controller for series hybrid power buses |
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