Test device simulating a plurality of memories and test method thereof

The present invention provides a test device simulating a plurality of memories and a test method thereof, which are used for testing a plurality of first memory connectors of a computer. Multiple first access commands are sent out by the computer to the test device through the first memory connecto...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MA ZHIDONG, XU BIN, HU JIANMING, YIN GUOHUANG
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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