Test device simulating a plurality of memories and test method thereof

Test device simulating a plurality of memories and test method thereof

The present invention provides a test device simulating a plurality of memories and a test method thereof, which are used for testing a plurality of first memory connectors of a computer. Multiple first access commands are sent out by the computer to the test device through the first memory connecto...

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Hauptverfasser: MA ZHIDONG, XU BIN, HU JIANMING, YIN GUOHUANG
Format: Patent
Sprache:chi ; eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator MA ZHIDONG
XU BIN
HU JIANMING
YIN GUOHUANG
description The present invention provides a test device simulating a plurality of memories and a test method thereof, which are used for testing a plurality of first memory connectors of a computer. Multiple first access commands are sent out by the computer to the test device through the first memory connectors so as to simulate the access operation for multiple access zones in the memories. The test device comprises a control unit and a test access zone. The control unit is coupled with the test access zone, and the first access commands are received by the control unit. The test access zone is used for simulating the access zones, and the control unit makes responses to the first access commands, and carries out the access operation of the first access commands for the test access zone. In the present invention, one access zone is arranged in a computer memory. The computer memory, different from the hard disk drive, has the characteristics of high reading-writing speed, so the test speed is high. Compared with the h
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Multiple first access commands are sent out by the computer to the test device through the first memory connectors so as to simulate the access operation for multiple access zones in the memories. The test device comprises a control unit and a test access zone. The control unit is coupled with the test access zone, and the first access commands are received by the control unit. The test access zone is used for simulating the access zones, and the control unit makes responses to the first access commands, and carries out the access operation of the first access commands for the test access zone. In the present invention, one access zone is arranged in a computer memory. The computer memory, different from the hard disk drive, has the characteristics of high reading-writing speed, so the test speed is high. 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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Test device simulating a plurality of memories and test method thereof
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