A system and method for executing instructions prior to an execution stage in a processor

A method of processing a plurality of instructions in multiple pipeline stages within a pipeline processor is disclosed. The method partially or wholly executes a stalled instruction in a pipeline stage that has a function other than instruction execution prior to the execution stage within the proc...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MCLLVAINE MICHAEL SCOTT, DIEFFENDERFER JAMES NORRIS, SETH KIRAN, NUNAMAKER NATHAN
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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