Controlling embedded memory access

Controlling embedded memory access

A microcontroller (30) includes a processor (32), an embedded memory (46) operatively coupled to the processor (32), and a microcontroller test interface (34) operatively connected to the processor (32) and the memory (36). The microcontroller (30) responds to a reset signal to perform a reset initi...

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Hauptverfasser: KHANH ATA, GOODHUE GREG, SHRIVASTAVA PANKAJ
Format: Patent
Sprache:chi ; eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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creator KHANH ATA
GOODHUE GREG
SHRIVASTAVA PANKAJ
description A microcontroller (30) includes a processor (32), an embedded memory (46) operatively coupled to the processor (32), and a microcontroller test interface (34) operatively connected to the processor (32) and the memory (36). The microcontroller (30) responds to a reset signal to perform a reset initiation that causes an initial disabled state of the test interface (34) to be set and execution of initiation code with the processor (32). This code execution optionally establishes a further disabled state. The microcontroller (30) provides an enabled state of the test interface for memory (46) access through the test interlace (34) during microcontroller (30) operation subsequent to the reset initiation unless the further disabled memory (46) access state is established by execution of the initiation code.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
title Controlling embedded memory access
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