Electronic circuit arrangement for control purposes
An electronic circuit arrangement ( 30 ) for controlling a process device ( 40 ) comprises a process interface circuitry ( 1 ) and a processing circuitry ( 2 ), wherein the process interface circuitry ( 1 ) is designed for receiving process signals from the process device ( 40 ) and converting the p...
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| creator | RUDOLF PAUL DECK BERNHARD JOHANSEN ERNST LOHER BERNHARD ZURFLUH FRANZ ZUEGER HANS-PETER |
| description | An electronic circuit arrangement ( 30 ) for controlling a process device ( 40 ) comprises a process interface circuitry ( 1 ) and a processing circuitry ( 2 ), wherein the process interface circuitry ( 1 ) is designed for receiving process signals from the process device ( 40 ) and converting the process signals into converted signals and/or digital data, which converted signals and/or digital so data are transmitted to the processing circuitry ( 2 ), and wherein the processing circuitry ( 2 ) is designed for processing the converted signals and/or digital data and for outputting processed signals and/or digital data, which processed signals and/or digital data are transmitted to the process interface circuitry ( 1 ), and wherein the process interface circuitry ( 1 ) is designed for converting the processed signals and/or digital data into control signals, which control signals are transmitted to the process device ( 40 ). The process interface circuitry comprises one or more first printed circuit board asse |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN101176180BB</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN101176180BB</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN101176180BB3</originalsourceid><addsrcrecordid>eNrjZDB2zUlNLinKz8tMVkjOLEouzSxRSCwqSsxLT81NzStRSMsvUkjOzwOqyFEoKC0qyC9OLeZhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfHOfoYGhobmZoYWBk5OxkQpAgCcni2M</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Electronic circuit arrangement for control purposes</title><source>esp@cenet</source><creator>RUDOLF PAUL ; DECK BERNHARD ; JOHANSEN ERNST ; LOHER BERNHARD ; ZURFLUH FRANZ ; ZUEGER HANS-PETER</creator><creatorcontrib>RUDOLF PAUL ; DECK BERNHARD ; JOHANSEN ERNST ; LOHER BERNHARD ; ZURFLUH FRANZ ; ZUEGER HANS-PETER</creatorcontrib><description>An electronic circuit arrangement ( 30 ) for controlling a process device ( 40 ) comprises a process interface circuitry ( 1 ) and a processing circuitry ( 2 ), wherein the process interface circuitry ( 1 ) is designed for receiving process signals from the process device ( 40 ) and converting the process signals into converted signals and/or digital data, which converted signals and/or digital so data are transmitted to the processing circuitry ( 2 ), and wherein the processing circuitry ( 2 ) is designed for processing the converted signals and/or digital data and for outputting processed signals and/or digital data, which processed signals and/or digital data are transmitted to the process interface circuitry ( 1 ), and wherein the process interface circuitry ( 1 ) is designed for converting the processed signals and/or digital data into control signals, which control signals are transmitted to the process device ( 40 ). The process interface circuitry comprises one or more first printed circuit board asse</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SWITCHES ; ELECTRICITY ; EMERGENCY PROTECTIVE DEVICES ; RELAYS ; SELECTORS</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110914&DB=EPODOC&CC=CN&NR=101176180B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110914&DB=EPODOC&CC=CN&NR=101176180B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>RUDOLF PAUL</creatorcontrib><creatorcontrib>DECK BERNHARD</creatorcontrib><creatorcontrib>JOHANSEN ERNST</creatorcontrib><creatorcontrib>LOHER BERNHARD</creatorcontrib><creatorcontrib>ZURFLUH FRANZ</creatorcontrib><creatorcontrib>ZUEGER HANS-PETER</creatorcontrib><title>Electronic circuit arrangement for control purposes</title><description>An electronic circuit arrangement ( 30 ) for controlling a process device ( 40 ) comprises a process interface circuitry ( 1 ) and a processing circuitry ( 2 ), wherein the process interface circuitry ( 1 ) is designed for receiving process signals from the process device ( 40 ) and converting the process signals into converted signals and/or digital data, which converted signals and/or digital so data are transmitted to the processing circuitry ( 2 ), and wherein the processing circuitry ( 2 ) is designed for processing the converted signals and/or digital data and for outputting processed signals and/or digital data, which processed signals and/or digital data are transmitted to the process interface circuitry ( 1 ), and wherein the process interface circuitry ( 1 ) is designed for converting the processed signals and/or digital data into control signals, which control signals are transmitted to the process device ( 40 ). The process interface circuitry comprises one or more first printed circuit board asse</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SWITCHES</subject><subject>ELECTRICITY</subject><subject>EMERGENCY PROTECTIVE DEVICES</subject><subject>RELAYS</subject><subject>SELECTORS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDB2zUlNLinKz8tMVkjOLEouzSxRSCwqSsxLT81NzStRSMsvUkjOzwOqyFEoKC0qyC9OLeZhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfHOfoYGhobmZoYWBk5OxkQpAgCcni2M</recordid><startdate>20110914</startdate><enddate>20110914</enddate><creator>RUDOLF PAUL</creator><creator>DECK BERNHARD</creator><creator>JOHANSEN ERNST</creator><creator>LOHER BERNHARD</creator><creator>ZURFLUH FRANZ</creator><creator>ZUEGER HANS-PETER</creator><scope>EVB</scope></search><sort><creationdate>20110914</creationdate><title>Electronic circuit arrangement for control purposes</title><author>RUDOLF PAUL ; DECK BERNHARD ; JOHANSEN ERNST ; LOHER BERNHARD ; ZURFLUH FRANZ ; ZUEGER HANS-PETER</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN101176180BB3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2011</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SWITCHES</topic><topic>ELECTRICITY</topic><topic>EMERGENCY PROTECTIVE DEVICES</topic><topic>RELAYS</topic><topic>SELECTORS</topic><toplevel>online_resources</toplevel><creatorcontrib>RUDOLF PAUL</creatorcontrib><creatorcontrib>DECK BERNHARD</creatorcontrib><creatorcontrib>JOHANSEN ERNST</creatorcontrib><creatorcontrib>LOHER BERNHARD</creatorcontrib><creatorcontrib>ZURFLUH FRANZ</creatorcontrib><creatorcontrib>ZUEGER HANS-PETER</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>RUDOLF PAUL</au><au>DECK BERNHARD</au><au>JOHANSEN ERNST</au><au>LOHER BERNHARD</au><au>ZURFLUH FRANZ</au><au>ZUEGER HANS-PETER</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Electronic circuit arrangement for control purposes</title><date>2011-09-14</date><risdate>2011</risdate><abstract>An electronic circuit arrangement ( 30 ) for controlling a process device ( 40 ) comprises a process interface circuitry ( 1 ) and a processing circuitry ( 2 ), wherein the process interface circuitry ( 1 ) is designed for receiving process signals from the process device ( 40 ) and converting the process signals into converted signals and/or digital data, which converted signals and/or digital so data are transmitted to the processing circuitry ( 2 ), and wherein the processing circuitry ( 2 ) is designed for processing the converted signals and/or digital data and for outputting processed signals and/or digital data, which processed signals and/or digital data are transmitted to the process interface circuitry ( 1 ), and wherein the process interface circuitry ( 1 ) is designed for converting the processed signals and/or digital data into control signals, which control signals are transmitted to the process device ( 40 ). The process interface circuitry comprises one or more first printed circuit board asse</abstract><oa>free_for_read</oa></addata></record> |
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| language | chi ; eng |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SWITCHES ELECTRICITY EMERGENCY PROTECTIVE DEVICES RELAYS SELECTORS |
| title | Electronic circuit arrangement for control purposes |
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